A virtual channel router for on-chip networks

N.K. Kavaldjiev, G.J.M. Smit, P.G. Jansen

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    Abstract

    This paper proposes an architecture of a virtual channel router for an on-chip network1. The router has simple dynamic arbitration which is deterministic and fair. We show that the size of the proposed router is reduced by 49% and the speed increases 1.4 times compared to a conventional virtual channel router.
    Original languageEnglish
    Place of PublicationEnschede
    PublisherCentre for Telematics and Information Technology (CTIT)
    Number of pages5
    Publication statusPublished - Jul 2004

    Publication series

    NameCTIT technical report series
    PublisherUniversity of Twente, Centre for Telematics and Information Technology (CTIT)
    No.TR-CTIT-04-30

    Keywords

    • CAES-EEA: Efficient Embedded Architectures

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