A virtual channel router for on-chip networks

N.K. Kavaldjiev; G.J.M. Smit; P.G. Jansen

doi:10.1109/SOCC.2004.1362438

A virtual channel router for on-chip networks

N.K. Kavaldjiev
, G.J.M. Smit
, P.G. Jansen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

60 Citations (Scopus)

280 Downloads (Pure)

Abstract

This paper proposes an architecture of a virtual channel router for an on-chip network1. The router has simple dynamic arbitration which is deterministic and fair. We show that the size of the proposed router is reduced by 49% and the speed increases 1.4 times compared to a conventional virtual channel router.

Original language	English
Title of host publication	IEEE International SOC Conference, 2004
Subtitle of host publication	Proceedings
Editors	John Chickanosky, Dong Ha, Richard Auletta
Place of Publication	Los Alamitos, CA
Publisher	IEEE
Pages	289-293
Number of pages	5
ISBN (Print)	0-7803-8445-8
DOIs	https://doi.org/10.1109/SOCC.2004.1362438
Publication status	Published - Sept 2004
Event	IEEE International Systems-on-Chip Conference, SOC 2004 - Hilton Santa Clara, Santa Clara, United States Duration: 12 Sept 2004 → 15 Sept 2004

Conference

Conference	IEEE International Systems-on-Chip Conference, SOC 2004
Abbreviated title	SOC
Country/Territory	United States
City	Santa Clara
Period	12/09/04 → 15/09/04

Keywords

CAES-EEA: Efficient Embedded Architectures

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10.1109/SOCC.2004.1362438

Kavaldjiev2004virtualAccepted author version, 102 KB

Cite this

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title = "A virtual channel router for on-chip networks",

abstract = "This paper proposes an architecture of a virtual channel router for an on-chip network1. The router has simple dynamic arbitration which is deterministic and fair. We show that the size of the proposed router is reduced by 49\% and the speed increases 1.4 times compared to a conventional virtual channel router.",

keywords = "CAES-EEA: Efficient Embedded Architectures",

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editor = "John Chickanosky and Dong Ha and Richard Auletta",

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Kavaldjiev, NK, Smit, GJM & Jansen, PG 2004, A virtual channel router for on-chip networks. in J Chickanosky, D Ha & R Auletta (eds), IEEE International SOC Conference, 2004: Proceedings. IEEE, Los Alamitos, CA, pp. 289-293, IEEE International Systems-on-Chip Conference, SOC 2004, Santa Clara, California, United States, 12/09/04. https://doi.org/10.1109/SOCC.2004.1362438

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T1 - A virtual channel router for on-chip networks

AU - Kavaldjiev, N.K.

AU - Smit, G.J.M.

AU - Jansen, P.G.

PY - 2004/9

Y1 - 2004/9

N2 - This paper proposes an architecture of a virtual channel router for an on-chip network1. The router has simple dynamic arbitration which is deterministic and fair. We show that the size of the proposed router is reduced by 49% and the speed increases 1.4 times compared to a conventional virtual channel router.

AB - This paper proposes an architecture of a virtual channel router for an on-chip network1. The router has simple dynamic arbitration which is deterministic and fair. We show that the size of the proposed router is reduced by 49% and the speed increases 1.4 times compared to a conventional virtual channel router.

KW - CAES-EEA: Efficient Embedded Architectures

U2 - 10.1109/SOCC.2004.1362438

DO - 10.1109/SOCC.2004.1362438

M3 - Conference contribution

SN - 0-7803-8445-8

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BT - IEEE International SOC Conference, 2004

A2 - Chickanosky, John

A2 - Ha, Dong

A2 - Auletta, Richard

PB - IEEE

CY - Los Alamitos, CA

T2 - IEEE International Systems-on-Chip Conference, SOC 2004

Y2 - 12 September 2004 through 15 September 2004

ER -

A virtual channel router for on-chip networks

Abstract

Conference

Keywords

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