Abstract
In this work we propose a novel feature for the transistor: a piezo-electric layer for strain modulation of the channel. The strain is formed at strong inversion only, to obtain a lower threshold voltage, but will be absent in the off-state to preserve the unstrained leakage current. Our results, obtained by combining electrical and mechanical finite element method simulation, demonstrate a seven mV/dec steeper subthreshold swing for a classical SOI transistor and ten mV/dec improvement for a silicon tunnel field effect transistor.
Original language | Undefined |
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Title of host publication | Solid-State Device Research Conference (ESSDERC), 2012 Proceedings of the European |
Place of Publication | USA |
Publisher | IEEE Solid-State Circuits Society |
Pages | 125-128 |
Number of pages | 4 |
ISBN (Print) | 978-1-4673-1706-1 |
DOIs | |
Publication status | Published - 17 Sep 2012 |
Event | 42nd European Solid-State Device Research Conference, ESSDERC 2012 - Bordeaux, France Duration: 17 Sep 2012 → 21 Sep 2012 Conference number: 42 |
Publication series
Name | |
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Publisher | IEEE Solid-State Circuits Society |
ISSN (Print) | 1930-8876 |
Conference
Conference | 42nd European Solid-State Device Research Conference, ESSDERC 2012 |
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Abbreviated title | ESSDERC |
Country/Territory | France |
City | Bordeaux |
Period | 17/09/12 → 21/09/12 |
Keywords
- EWI-23032
- METIS-296282
- IR-84100