An Array processor Design methodology for hard Real-time systems

J.A.K.S. Jayasinghe

Research output: Thesis › PhD Thesis - Research UT, graduation UT

Keywords

@phdthesis{e8e33a5e1c6241008771528b74e407cd,

title = "An Array processor Design methodology for hard Real-time systems",

keywords = "METIS-111382",

author = "J.A.K.S. Jayasinghe",

year = "1991",

month = may,

day = "17",

language = "Undefined",

isbn = "90-9004031-5",

publisher = "University of Twente",

address = "Netherlands",

type = "PhD Thesis - Research UT, graduation UT",

school = "University of Twente",

}