An Array Processor Design Methodology for Real-Time Systems

J.A.K.S. Jayasinghe, F. Moelaert El-Hadidy, O.E. Herrmann

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    Abstract

    An array processor design methodology suitable for hard real-time systems is presented. Scheduling and projection of the dependence graph (DG) are solved using integer programming. By exploring the regularity of the DG it is possible to solve the necessary IP problems in an efficient manner. This methodology provides a unified approach for linear and nonlinear projection of regular and partially regular DGs
    Original languageEnglish
    Title of host publication1991 IEEE International Symposium on Circuits and Systems (ISCAS)
    Place of PublicationSingapore
    Pages3062-3065
    Number of pages4
    Volume5
    DOIs
    Publication statusPublished - 11 Jun 1991
    EventIEEE International Symposium on Circuits and Systems, ISCAS 1991 - Singapore, Singapore
    Duration: 11 Jun 199114 Jun 1991

    Conference

    ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 1991
    Abbreviated titleISCAS
    CountrySingapore
    CitySingapore
    Period11/06/9114/06/91

    Keywords

    • Scheduling
    • Real time systems
    • Parallel architectures

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