An Array Processor Design Methodology for Real-time Systems

J.A.K.S. Jayasinghe, F. El hadidy, O.E. Herrmann

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    Original languageUndefined
    Title of host publicationProceedings of the IEEE/ProRISK, Symposium on circuits, Systems and Signal Processing
    Place of PublicationVeldhoven, The Netherlands
    Pages210-213
    Number of pages4
    Publication statusPublished - 3 Apr 1991

    Keywords

    • METIS-113096

    Cite this

    Jayasinghe, J. A. K. S., El hadidy, F., & Herrmann, O. E. (1991). An Array Processor Design Methodology for Real-time Systems. In Proceedings of the IEEE/ProRISK, Symposium on circuits, Systems and Signal Processing (pp. 210-213). Veldhoven, The Netherlands.
    Jayasinghe, J.A.K.S. ; El hadidy, F. ; Herrmann, O.E. / An Array Processor Design Methodology for Real-time Systems. Proceedings of the IEEE/ProRISK, Symposium on circuits, Systems and Signal Processing. Veldhoven, The Netherlands, 1991. pp. 210-213
    @inproceedings{60330bce3d82410fb7b823661ec51fcc,
    title = "An Array Processor Design Methodology for Real-time Systems",
    keywords = "METIS-113096",
    author = "J.A.K.S. Jayasinghe and {El hadidy}, F. and O.E. Herrmann",
    year = "1991",
    month = "4",
    day = "3",
    language = "Undefined",
    pages = "210--213",
    booktitle = "Proceedings of the IEEE/ProRISK, Symposium on circuits, Systems and Signal Processing",

    }

    Jayasinghe, JAKS, El hadidy, F & Herrmann, OE 1991, An Array Processor Design Methodology for Real-time Systems. in Proceedings of the IEEE/ProRISK, Symposium on circuits, Systems and Signal Processing. Veldhoven, The Netherlands, pp. 210-213.

    An Array Processor Design Methodology for Real-time Systems. / Jayasinghe, J.A.K.S.; El hadidy, F.; Herrmann, O.E.

    Proceedings of the IEEE/ProRISK, Symposium on circuits, Systems and Signal Processing. Veldhoven, The Netherlands, 1991. p. 210-213.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    TY - GEN

    T1 - An Array Processor Design Methodology for Real-time Systems

    AU - Jayasinghe, J.A.K.S.

    AU - El hadidy, F.

    AU - Herrmann, O.E.

    PY - 1991/4/3

    Y1 - 1991/4/3

    KW - METIS-113096

    M3 - Conference contribution

    SP - 210

    EP - 213

    BT - Proceedings of the IEEE/ProRISK, Symposium on circuits, Systems and Signal Processing

    CY - Veldhoven, The Netherlands

    ER -

    Jayasinghe JAKS, El hadidy F, Herrmann OE. An Array Processor Design Methodology for Real-time Systems. In Proceedings of the IEEE/ProRISK, Symposium on circuits, Systems and Signal Processing. Veldhoven, The Netherlands. 1991. p. 210-213