An audio FIR-DAC in a BCD process for high power Class-D amplifiers

T.S. Doorn; E. van Tuijl; D. Schinkel; A.J. Annema; M. Berkhout; B. Nauta

doi:10.1109/ESSCIR.2005.1541659

An audio FIR-DAC in a BCD process for high power Class-D amplifiers

T.S. Doorn, E. van Tuijl, D. Schinkel, A.J. Annema, M. Berkhout, B. Nauta

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

9 Citations (Scopus)

407 Downloads (Pure)

Abstract

A 322 coefficient semi-digital FIR-DAC using a 1-bit PWM input signal was designed and implemented in a high voltage, audio power bipolar CMOS DMOS (BCD) process. This facilitates digital input signals for an analog class-D amplifier in BCD. The FIR-DAC performance depends on the ISI-resistant nature of this PWM-signal. An impulse response with only positive coefficients was chosen, because of its resistance to deadzone and mismatch. With a DAC current of 0.5 mA, the dynamic range is 111 dB (A-weighted), with SINAD = 103 dB (A-weighted). The current consumption is 1mA for the analog part and 4.8 mA for the digital part. The power consumption is 29 mW at Vdd = 5 V and the chip area is 2 mm2 including the reference diode that can be shared by more channels

Original language	English
Title of host publication	31st European Solid-State Circuits Conference (ESSCIRC 2005)
Place of Publication	Piscataway, NJ
Publisher	IEEE
Pages	459-462
Number of pages	4
ISBN (Print)	0-7803-9205-1
DOIs	https://doi.org/10.1109/ESSCIR.2005.1541659
Publication status	Published - Sept 2005
Event	31st European Solid-State Circuits Conference, ESSCIRC 2005 - Grenoble, France Duration: 12 Sept 2005 → 16 Sept 2005 Conference number: 31

Publication series

Name	Proceedings European Solid-State Circuits Conference (ESSCIRC)
Publisher	IEEE
Volume	2005
ISSN (Print)	1930-8833

Conference

Conference	31st European Solid-State Circuits Conference, ESSCIRC 2005
Abbreviated title	ESSCIRC
Country/Territory	France
City	Grenoble
Period	12/09/05 → 16/09/05

Access to Document

10.1109/ESSCIR.2005.1541659

Cite this

@inproceedings{fb97bd3f608b4cd9819b18990661d94c,

title = "An audio FIR-DAC in a BCD process for high power Class-D amplifiers",

abstract = "A 322 coefficient semi-digital FIR-DAC using a 1-bit PWM input signal was designed and implemented in a high voltage, audio power bipolar CMOS DMOS (BCD) process. This facilitates digital input signals for an analog class-D amplifier in BCD. The FIR-DAC performance depends on the ISI-resistant nature of this PWM-signal. An impulse response with only positive coefficients was chosen, because of its resistance to deadzone and mismatch. With a DAC current of 0.5 mA, the dynamic range is 111 dB (A-weighted), with SINAD = 103 dB (A-weighted). The current consumption is 1mA for the analog part and 4.8 mA for the digital part. The power consumption is 29 mW at Vdd = 5 V and the chip area is 2 mm2 including the reference diode that can be shared by more channels",

author = "T.S. Doorn and {van Tuijl}, E. and D. Schinkel and A.J. Annema and M. Berkhout and B. Nauta",

year = "2005",

month = sep,

doi = "10.1109/ESSCIR.2005.1541659",

language = "English",

isbn = "0-7803-9205-1",

series = "Proceedings European Solid-State Circuits Conference (ESSCIRC)",

publisher = "IEEE",

pages = "459--462",

booktitle = "31st European Solid-State Circuits Conference (ESSCIRC 2005)",

address = "United States",

note = "31st European Solid-State Circuits Conference, ESSCIRC 2005, ESSCIRC ; Conference date: 12-09-2005 Through 16-09-2005",

}

Doorn, TS, van Tuijl, E, Schinkel, D, Annema, AJ, Berkhout, M & Nauta, B 2005, An audio FIR-DAC in a BCD process for high power Class-D amplifiers. in 31st European Solid-State Circuits Conference (ESSCIRC 2005). Proceedings European Solid-State Circuits Conference (ESSCIRC), vol. 2005, IEEE, Piscataway, NJ, pp. 459-462, 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12/09/05. https://doi.org/10.1109/ESSCIR.2005.1541659

An audio FIR-DAC in a BCD process for high power Class-D amplifiers. / Doorn, T.S.; van Tuijl, E.; Schinkel, D. et al.
31st European Solid-State Circuits Conference (ESSCIRC 2005). Piscataway, NJ: IEEE, 2005. p. 459-462 (Proceedings European Solid-State Circuits Conference (ESSCIRC); Vol. 2005).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - An audio FIR-DAC in a BCD process for high power Class-D amplifiers

AU - Doorn, T.S.

AU - van Tuijl, E.

AU - Schinkel, D.

AU - Annema, A.J.

AU - Berkhout, M.

AU - Nauta, B.

N1 - Conference code: 31

PY - 2005/9

Y1 - 2005/9

N2 - A 322 coefficient semi-digital FIR-DAC using a 1-bit PWM input signal was designed and implemented in a high voltage, audio power bipolar CMOS DMOS (BCD) process. This facilitates digital input signals for an analog class-D amplifier in BCD. The FIR-DAC performance depends on the ISI-resistant nature of this PWM-signal. An impulse response with only positive coefficients was chosen, because of its resistance to deadzone and mismatch. With a DAC current of 0.5 mA, the dynamic range is 111 dB (A-weighted), with SINAD = 103 dB (A-weighted). The current consumption is 1mA for the analog part and 4.8 mA for the digital part. The power consumption is 29 mW at Vdd = 5 V and the chip area is 2 mm2 including the reference diode that can be shared by more channels

AB - A 322 coefficient semi-digital FIR-DAC using a 1-bit PWM input signal was designed and implemented in a high voltage, audio power bipolar CMOS DMOS (BCD) process. This facilitates digital input signals for an analog class-D amplifier in BCD. The FIR-DAC performance depends on the ISI-resistant nature of this PWM-signal. An impulse response with only positive coefficients was chosen, because of its resistance to deadzone and mismatch. With a DAC current of 0.5 mA, the dynamic range is 111 dB (A-weighted), with SINAD = 103 dB (A-weighted). The current consumption is 1mA for the analog part and 4.8 mA for the digital part. The power consumption is 29 mW at Vdd = 5 V and the chip area is 2 mm2 including the reference diode that can be shared by more channels

U2 - 10.1109/ESSCIR.2005.1541659

DO - 10.1109/ESSCIR.2005.1541659

M3 - Conference contribution

SN - 0-7803-9205-1

T3 - Proceedings European Solid-State Circuits Conference (ESSCIRC)

SP - 459

EP - 462

BT - 31st European Solid-State Circuits Conference (ESSCIRC 2005)

PB - IEEE

CY - Piscataway, NJ

T2 - 31st European Solid-State Circuits Conference, ESSCIRC 2005

Y2 - 12 September 2005 through 16 September 2005

ER -

An audio FIR-DAC in a BCD process for high power Class-D amplifiers

Abstract

Publication series

Conference

Access to Document

Fingerprint

Cite this