Abstract
A 322 coefficient semi-digital FIR-DAC using a 1-bit PWM input signal was designed and implemented in a high voltage, audio power bipolar CMOS DMOS (BCD) process. This facilitates digital input signals for an analog class-D amplifier in BCD. The FIR-DAC performance depends on the ISI-resistant nature of this PWM-signal. An impulse response with only positive coefficients was chosen, because of its resistance to deadzone and mismatch. With a DAC current of 0.5 mA, the dynamic range is 111 dB (A-weighted), with SINAD = 103 dB (A-weighted). The current consumption is 1mA for the analog part and 4.8 mA for the digital part. The power consumption is 29 mW at Vdd = 5 V and the chip area is 2 mm2 including the reference diode that can be shared by more channels
| Original language | English |
|---|---|
| Title of host publication | 31st European Solid-State Circuits Conference (ESSCIRC 2005) |
| Place of Publication | Piscataway, NJ |
| Publisher | IEEE |
| Pages | 459-462 |
| Number of pages | 4 |
| ISBN (Print) | 0-7803-9205-1 |
| DOIs | |
| Publication status | Published - Sept 2005 |
| Event | 31st European Solid-State Circuits Conference, ESSCIRC 2005 - Grenoble, France Duration: 12 Sept 2005 → 16 Sept 2005 Conference number: 31 |
Publication series
| Name | Proceedings European Solid-State Circuits Conference (ESSCIRC) |
|---|---|
| Publisher | IEEE |
| Volume | 2005 |
| ISSN (Print) | 1930-8833 |
Conference
| Conference | 31st European Solid-State Circuits Conference, ESSCIRC 2005 |
|---|---|
| Abbreviated title | ESSCIRC |
| Country/Territory | France |
| City | Grenoble |
| Period | 12/09/05 → 16/09/05 |
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