An energy-efficient Network-on-Chip for a heterogeneous tiled reconfigurable System-on-Chip

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    Abstract

    This paper proposes a Network-on-Chip architecture that offers high flexibility and performance. It is used in a System-on-Chip platform for future multimedia mobile devices. The network is packet switching wormhole network with virtual-channel flow control and source routing. The initial implementation results for a network router show its feasibility and size comparable with other available solutions.
    Original languageUndefined
    Title of host publicationEUROMICRO Symp. on Digital System Design (DSD)
    Place of PublicationLos Alamitos, California
    PublisherIEEE Computer Society Press
    Pages492-498
    Number of pages7
    ISBN (Print)0-7695-2203-3
    DOIs
    Publication statusPublished - Sep 2004
    Event7th EUROMICRO Symposium on Digital System Design, DSD 2004 - Rennes, France
    Duration: 31 Aug 20043 Sep 2004
    Conference number: 7

    Publication series

    Name
    PublisherIEEE Computer Society Press

    Conference

    Conference7th EUROMICRO Symposium on Digital System Design, DSD 2004
    Abbreviated titleDSD
    CountryFrance
    CityRennes
    Period31/08/043/09/04

    Keywords

    • CAES-EEA: Efficient Embedded Architectures
    • EWI-774
    • METIS-220310
    • IR-48650

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