An energy-efficient Network-on-Chip for a heterogeneous tiled reconfigurable Systems-on-Chip

N.K. Kavaldjiev, G.J.M. Smit

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    8 Citations (Scopus)
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    Abstract

    This paper proposes a Network-on-Chip architecture that offers high flexibility and performance. It is used in a System-on-Chip platform for future multimedia mobile devices. The network is packet switching wormhole network with virtual-channel flow control and source routing. The initial implementation results for a network router show its feasibility and size comparable with other available solutions.
    Original languageEnglish
    Place of PublicationEnschede
    PublisherCentre for Telematics and Information Technology (CTIT)
    Number of pages7
    Publication statusPublished - Jun 2004

    Publication series

    NameCTIT technical report series
    PublisherUniversity of Twente, Centre for Telematics and Information Technology (CTIT)
    No.TR-CTIT-04-25

    Keywords

    • CAES-EEA: Efficient Embedded Architectures

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    • An energy-efficient Network-on-Chip for a heterogeneous tiled reconfigurable Systems-on-Chip

      Kavaldjiev, N. K. & Smit, G. J. M., Sept 2004, Euromicro Symposium on Digital System Design, DSD 2004. Los Alamitos, CA: IEEE, p. 492-498 7 p.

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