An Implementation for Test-Time Reduction in VLWI Transport-Triggered Architectures

V. Zivkovic, R.J.W.T. Tangelder, Hans G. Kerkhoff

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Original language	Undefined
Title of host publication	IEEE Computer Society Proceedings of the ETW
Place of Publication	Stockholm, Sweden
Pages	106-113
Number of pages	8
Publication status	Published - 29 May 2001
Event	ETW Conference: Proceedings of the ETW - Stockholm, Sweden Duration: 29 May 2001 → 1 Jun 2001

Keywords

@inproceedings{88b8edafde9b496aa149714070622e41,

title = "An Implementation for Test-Time Reduction in VLWI Transport-Triggered Architectures",

keywords = "METIS-201886",

author = "V. Zivkovic and R.J.W.T. Tangelder and Kerkhoff, {Hans G.}",

year = "2001",

month = may,

day = "29",

language = "Undefined",

isbn = "0-7695-1017-5",

pages = "106--113",

booktitle = "IEEE Computer Society Proceedings of the ETW",

note = "null ; Conference date: 29-05-2001 Through 01-06-2001",

}

TY - GEN

T1 - An Implementation for Test-Time Reduction in VLWI Transport-Triggered Architectures

AU - Zivkovic, V.

AU - Tangelder, R.J.W.T.

AU - Kerkhoff, Hans G.

PY - 2001/5/29

Y1 - 2001/5/29

KW - METIS-201886

M3 - Conference contribution

SN - 0-7695-1017-5

SP - 106

EP - 113

BT - IEEE Computer Society Proceedings of the ETW

CY - Stockholm, Sweden

Y2 - 29 May 2001 through 1 June 2001

ER -