An Integrated Circuit Provided with a Fail-Safe Mode

Anne J. Annema (Inventor), Godefridus Johannes Gertrudis Maria Geelen (Inventor)

    Research output: Patent

    11 Downloads (Pure)

    Abstract

    The invention relates to an integrated circuit comprising a first supply voltage bondpad; a second supply voltage bondpad; a combined input/output bondpad; an output driving stage for supplying a digital output signal comprising a first transistor and a second transistor, the first transistor having a first main terminal coupled to the second supply voltage bondpad, a second main terminal, and a control terminal, the second transistor having a first main terminal coupled to the second main terminal of the first transistor, a second main terminal coupled to the combined input/output bondpad, and a control terminal; a further output driving stage coupled between the combined input/output bondpad and the first supply voltage bondpad; and a pre-drive circuit for receiving a digital input signal and for supplying a first voltage to the control terminal of the first transistor, a second voltage to the control terminal of the second transistor, and a third voltage to a control terminal of the further output driving stage.
    Original languageEnglish
    Patent numberUS6304112
    Priority date16/10/01
    Publication statusPublished - 16 Oct 2001

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  • Cite this

    Annema, A. J., & Geelen, G. J. G. M. (2001). An Integrated Circuit Provided with a Fail-Safe Mode. (Patent No. US6304112).