An Integrated Circuit Provided with a Fail-Safe Mode

The invention relates to an integrated circuit comprising a first supply voltage bondpad; a second supply voltage bondpad; a combined input/output bondpad; an output driving stage for supplying a digital output signal comprising a first transistor and a second transistor, the first transistor having a first main terminal coupled to the second supply voltage bondpad, a second main terminal, and a control terminal, the second transistor having a first main terminal coupled to the second main terminal of the first transistor, a second main terminal coupled to the combined input/output bondpad, and a control terminal; a further output driving stage coupled between the combined input/output bondpad and the first supply voltage bondpad; and a pre-drive circuit for receiving a digital input signal and for supplying a first voltage to the control terminal of the first transistor, a second voltage to the control terminal of the second transistor, and a third voltage to a control terminal of the further output driving stage.