An Integrated Circuit Provided with a Fail-Safe Mode

Anne J. Annema; Godefridus Johannes Gertrudis Maria Geelen

An Integrated Circuit Provided with a Fail-Safe Mode

Anne J. Annema (Inventor), Godefridus Johannes Gertrudis Maria Geelen (Inventor)

Research output: Patent

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Abstract

The invention relates to an integrated circuit comprising a first supply voltage bondpad; a second supply voltage bondpad; a combined input/output bondpad; an output driving stage for supplying a digital output signal comprising a first transistor and a second transistor, the first transistor having a first main terminal coupled to the second supply voltage bondpad, a second main terminal, and a control terminal, the second transistor having a first main terminal coupled to the second main terminal of the first transistor, a second main terminal coupled to the combined input/output bondpad, and a control terminal; a further output driving stage coupled between the combined input/output bondpad and the first supply voltage bondpad; and a pre-drive circuit for receiving a digital input signal and for supplying a first voltage to the control terminal of the first transistor, a second voltage to the control terminal of the second transistor, and a third voltage to a control terminal of the further output driving stage.

Original language	English
Patent number	US6304112
Priority date	16/10/01
Publication status	Published - 16 Oct 2001

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US6304112Final published version, 328 KB

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title = "An Integrated Circuit Provided with a Fail-Safe Mode",

abstract = "The invention relates to an integrated circuit comprising a first supply voltage bondpad; a second supply voltage bondpad; a combined input/output bondpad; an output driving stage for supplying a digital output signal comprising a first transistor and a second transistor, the first transistor having a first main terminal coupled to the second supply voltage bondpad, a second main terminal, and a control terminal, the second transistor having a first main terminal coupled to the second main terminal of the first transistor, a second main terminal coupled to the combined input/output bondpad, and a control terminal; a further output driving stage coupled between the combined input/output bondpad and the first supply voltage bondpad; and a pre-drive circuit for receiving a digital input signal and for supplying a first voltage to the control terminal of the first transistor, a second voltage to the control terminal of the second transistor, and a third voltage to a control terminal of the further output driving stage.",

author = "Annema, {Anne J.} and Geelen, {Godefridus Johannes Gertrudis Maria}",

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T1 - An Integrated Circuit Provided with a Fail-Safe Mode

AU - Annema, Anne J.

AU - Geelen, Godefridus Johannes Gertrudis Maria

PY - 2001/10/16

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N2 - The invention relates to an integrated circuit comprising a first supply voltage bondpad; a second supply voltage bondpad; a combined input/output bondpad; an output driving stage for supplying a digital output signal comprising a first transistor and a second transistor, the first transistor having a first main terminal coupled to the second supply voltage bondpad, a second main terminal, and a control terminal, the second transistor having a first main terminal coupled to the second main terminal of the first transistor, a second main terminal coupled to the combined input/output bondpad, and a control terminal; a further output driving stage coupled between the combined input/output bondpad and the first supply voltage bondpad; and a pre-drive circuit for receiving a digital input signal and for supplying a first voltage to the control terminal of the first transistor, a second voltage to the control terminal of the second transistor, and a third voltage to a control terminal of the further output driving stage.

AB - The invention relates to an integrated circuit comprising a first supply voltage bondpad; a second supply voltage bondpad; a combined input/output bondpad; an output driving stage for supplying a digital output signal comprising a first transistor and a second transistor, the first transistor having a first main terminal coupled to the second supply voltage bondpad, a second main terminal, and a control terminal, the second transistor having a first main terminal coupled to the second main terminal of the first transistor, a second main terminal coupled to the combined input/output bondpad, and a control terminal; a further output driving stage coupled between the combined input/output bondpad and the first supply voltage bondpad; and a pre-drive circuit for receiving a digital input signal and for supplying a first voltage to the control terminal of the first transistor, a second voltage to the control terminal of the second transistor, and a third voltage to a control terminal of the further output driving stage.

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M1 - US6304112

ER -