### Abstract

Original language | Undefined |
---|---|

Pages | 119-121 |

Publication status | Published - 1986 |

### Keywords

- IR-96391

### Cite this

*Analog CMOS computational circuits*. 119-121.

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**Analog CMOS computational circuits.** / Bult, Klaas; Wallinga, Hans.

Research output: Contribution to conference › Paper › Academic

TY - CONF

T1 - Analog CMOS computational circuits

AU - Bult, Klaas

AU - Wallinga, Hans

PY - 1986

Y1 - 1986

N2 - A new CMOS three transistor current squaring circuit is proposed. The versatility of the circuit is shown in three applications: an eight transistor four-quadrant current multiplier/divider circuit with a THD of less than 0.8% at an output current of 80% of the bias current, a floating input linear V-I convertor with variable transconductance and a THD of less than 0.28% at an output current of 120% of the bias current and a bandwidth of above 5 Mhz, and a four-quadrant voltage multiplier.

AB - A new CMOS three transistor current squaring circuit is proposed. The versatility of the circuit is shown in three applications: an eight transistor four-quadrant current multiplier/divider circuit with a THD of less than 0.8% at an output current of 80% of the bias current, a floating input linear V-I convertor with variable transconductance and a THD of less than 0.28% at an output current of 120% of the bias current and a bandwidth of above 5 Mhz, and a four-quadrant voltage multiplier.

KW - IR-96391

M3 - Paper

SP - 119

EP - 121

ER -