Abstract
IEEE 1687 (iJTAG) standard introduces a methodology for accessing the increasing number of embedded instruments found in modern System-on-Chips. Retargeting is defined by iJTAG as the procedure of translating instrument-level patterns to system-level scan vectors for a certain network organization. The analysis and the design of an on-chip retargeting engine is presented in this paper. Performing retargeting on-chip enables the execution of life-time dependability procedures using embedded instruments. The proposed engine is capable of retargeting instruments' patterns using an optimized model of the network, which is extracted by resolving the dependencies between the data registers of the instruments and the network-state registers.
Original language | Undefined |
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Title of host publication | 21st IEEE European Test Symposium (ETS 2016) |
Place of Publication | USA |
Publisher | IEEE |
Pages | 1-6 |
Number of pages | 6 |
ISBN (Print) | 978-1-4673-9659-2 |
DOIs | |
Publication status | Published - Jul 2016 |
Event | 21st IEEE European Test Symposium, ETS 2016 - Amsterdam, Netherlands Duration: 23 May 2016 → 26 May 2016 Conference number: 21 |
Publication series
Name | |
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Publisher | IEEE Circuits & Systems Society |
Conference
Conference | 21st IEEE European Test Symposium, ETS 2016 |
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Abbreviated title | ETS |
Country/Territory | Netherlands |
City | Amsterdam |
Period | 23/05/16 → 26/05/16 |
Keywords
- EWI-27115
- CR-B.8.1
- IR-101018
- METIS-318480
- EC Grant Agreement nr.: FP7/619871