Analysis of Switched Capacitor Losses in Polar and Quadrature Switched Capacitor PAs

Joep Osger Pepijn Zanen; Eric A.M. Klumperink; Bram  Nauta

doi:10.1109/TCSII.2019.2957576

Analysis of Switched Capacitor Losses in Polar and Quadrature Switched Capacitor PAs

Joep Osger Pepijn Zanen, Eric A.M. Klumperink, Bram Nauta

Research output: Contribution to journal › Article › Academic › peer-review

5 Citations (Scopus)

672 Downloads (Pure)

Abstract

This brief derives the efficiency limitations of switched capacitor power amplifiers (SCPAs) due to switched capacitor (SC) losses during charging and discharging of their capacitor arrays. Polar modulation is covered, as well as quadrature modulation both with clock duty cycles of 50% (Q50) and 25% (Q25). Closed form expressions are derived for both the maximum output power and SC power loss for signals with arbitrary phase and amplitude. These expressions are verified by simulations using ideal switches and capacitors, and 22 nm CMOS transistor models. These results are used to analyze the SCPA efficiency for 64QAM signals using a statistical model. It is shown that for a given array capacitance and supply voltage, the polar architecture is the most power efficient. Compared to polar modulation, the SC loss for 64QAM is fundamentally 18% higher for Q50 and 46% higher for Q25 SCPAs, whereas the generated output powers are fundamentally 6 and 3dB lower, respectively.

Original language	English
Article number	8922588
Pages (from-to)	1904-1908
Number of pages	5
Journal	IEEE transactions on circuits and systems II: express briefs
Volume	67
Issue number	10
Early online date	4 Dec 2019
DOIs	https://doi.org/10.1109/TCSII.2019.2957576
Publication status	Published - 1 Oct 2020

Keywords

Class-D glspa
glspa
glsrfdac
digital glspa
polar transmitter
quadrature transmitter
power generation
Switches
Capacitance
Modulation
Mathematical model
Capacitors

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10.1109/TCSII.2019.2957576

Zanen_Analysis of Switched Capacitor Losses in Polar and Quadrature SwitAccepted author version, 1.57 MB

5 Citations
1 Article

A Predistortion-less digital transmitter with –50 dB ACLR exploiting output conductance linearization
Zanen, J., Klumperink, E. & Nauta, B., 2021, In: IEEE Solid State Circuits Letters. 4, p. 162-165 4 p.
Research output: Contribution to journal › Article › Academic › peer-review

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3 Citations (Scopus)

292 Downloads (Pure)

Cite this

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title = "Analysis of Switched Capacitor Losses in Polar and Quadrature Switched Capacitor PAs",

abstract = "This brief derives the efficiency limitations of switched capacitor power amplifiers (SCPAs) due to switched capacitor (SC) losses during charging and discharging of their capacitor arrays. Polar modulation is covered, as well as quadrature modulation both with clock duty cycles of 50% (Q50) and 25% (Q25). Closed form expressions are derived for both the maximum output power and SC power loss for signals with arbitrary phase and amplitude. These expressions are verified by simulations using ideal switches and capacitors, and 22 nm CMOS transistor models. These results are used to analyze the SCPA efficiency for 64QAM signals using a statistical model. It is shown that for a given array capacitance and supply voltage, the polar architecture is the most power efficient. Compared to polar modulation, the SC loss for 64QAM is fundamentally 18% higher for Q50 and 46% higher for Q25 SCPAs, whereas the generated output powers are fundamentally 6 and 3dB lower, respectively.",

keywords = "Class-D glspa, glspa, glsrfdac, digital glspa, polar transmitter, quadrature transmitter, power generation, Switches, Capacitance, Modulation, Mathematical model, Capacitors",

author = "Zanen, {Joep Osger Pepijn} and Klumperink, {Eric A.M.} and Bram Nauta",

note = "Funding Information: Manuscript received September 16, 2019; revised November 13, 2019; accepted December 2, 2019. Date of publication December 4, 2019; date of current version October 5, 2020. This work was supported by the Netherlands Organisation for Scientific Research (NWO), under Project 14689. This brief was recommended by Associate Editor H. Sekiya. (Corresponding author: Joep Zanen.) The authors are with the IC-Design Group, Faculty of Electrical Engineering, Mathematics, and Computer Science, University of Twente, 7500 Enschede, The Netherlands (e-mail: [email protected]). Digital Object Identifier 10.1109/TCSII.2019.2957576 1549-7747 {\textcopyright}c 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See https://www.ieee.org/publications/rights/index.html for more information. Publisher Copyright: {\textcopyright} 2004-2012 IEEE.",

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N1 - Funding Information: Manuscript received September 16, 2019; revised November 13, 2019; accepted December 2, 2019. Date of publication December 4, 2019; date of current version October 5, 2020. This work was supported by the Netherlands Organisation for Scientific Research (NWO), under Project 14689. This brief was recommended by Associate Editor H. Sekiya. (Corresponding author: Joep Zanen.) The authors are with the IC-Design Group, Faculty of Electrical Engineering, Mathematics, and Computer Science, University of Twente, 7500 Enschede, The Netherlands (e-mail: [email protected]). Digital Object Identifier 10.1109/TCSII.2019.2957576 1549-7747 ©c 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See https://www.ieee.org/publications/rights/index.html for more information. Publisher Copyright: © 2004-2012 IEEE.

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N2 - This brief derives the efficiency limitations of switched capacitor power amplifiers (SCPAs) due to switched capacitor (SC) losses during charging and discharging of their capacitor arrays. Polar modulation is covered, as well as quadrature modulation both with clock duty cycles of 50% (Q50) and 25% (Q25). Closed form expressions are derived for both the maximum output power and SC power loss for signals with arbitrary phase and amplitude. These expressions are verified by simulations using ideal switches and capacitors, and 22 nm CMOS transistor models. These results are used to analyze the SCPA efficiency for 64QAM signals using a statistical model. It is shown that for a given array capacitance and supply voltage, the polar architecture is the most power efficient. Compared to polar modulation, the SC loss for 64QAM is fundamentally 18% higher for Q50 and 46% higher for Q25 SCPAs, whereas the generated output powers are fundamentally 6 and 3dB lower, respectively.

AB - This brief derives the efficiency limitations of switched capacitor power amplifiers (SCPAs) due to switched capacitor (SC) losses during charging and discharging of their capacitor arrays. Polar modulation is covered, as well as quadrature modulation both with clock duty cycles of 50% (Q50) and 25% (Q25). Closed form expressions are derived for both the maximum output power and SC power loss for signals with arbitrary phase and amplitude. These expressions are verified by simulations using ideal switches and capacitors, and 22 nm CMOS transistor models. These results are used to analyze the SCPA efficiency for 64QAM signals using a statistical model. It is shown that for a given array capacitance and supply voltage, the polar architecture is the most power efficient. Compared to polar modulation, the SC loss for 64QAM is fundamentally 18% higher for Q50 and 46% higher for Q25 SCPAs, whereas the generated output powers are fundamentally 6 and 3dB lower, respectively.

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KW - Modulation

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JO - IEEE transactions on circuits and systems II: express briefs

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Analysis of Switched Capacitor Losses in Polar and Quadrature Switched Capacitor PAs

Abstract

Keywords

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Research output

A Predistortion-less digital transmitter with –50 dB ACLR exploiting output conductance linearization

Cite this