Many critical design trade-offs of the Class-E poweramplifier (e.g power efficiency) are influenced by the switch onresistanceand the value of dc-feed drain inductance. In literature,the time-domain mathematical analyses of the Class-E poweramplifier with finite dc-feed inductance assume zero switch onresistancein order to alleviate the mathematical difficulties;resulting in non-optimum designs.We present analytical design equations in this paper forClass-E power amplifier taking into account both finite draininductance and switch on-resistance. The analysis indicates theexistence of infinitely many design equations; conclusions include:1) Class-E conditions (e.g. zero voltage and zero slope) can besatisfied in the presence of switch-on resistance.2) The drain-efficiency (η) of the Class-E power amplifier isupper limited for a certain operation frequency and transistortechnology.3) Using a finite dc-feed inductance instead of an RF-choke ina Class-E power amplifier can increase η by ≈ 30%.
|Title of host publication
|The IEEE International Symposium on Circuits and Systems (ISCAS)-2007.
|Place of Publication
|Number of pages
|Published - 27 May 2007
|IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, United States
Duration: 27 May 2007 → 30 May 2007
|IEEE International Symposium on Circuits and Systems, ISCAS 2007
|27/05/07 → 30/05/07