Applying Dataflow Analysis to Dimension Buffers for Guaranteed Performance in Networks on Chip

A. Hansson, Andreas Hansson, M.H. Wiggers, Arno Moonen, Kees Goossens, Marco Jan Gerrit Bekooij, Marco Bekooij

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    23 Citations (Scopus)
    84 Downloads (Pure)


    A Network on Chip (NoC) with end-to-end flow control is modelled by a cyclo-static dataflow graph. Using the proposed model together with state-of-the-art dataflow analysis algorithms, we size the buffers in the network interfaces. We show, for a range of NoC designs, that buffer sizes are determined with a run time comparable to existing analytical methods, and results comparable to exhaustive simulation.
    Original languageUndefined
    Title of host publicationSecond ACM/IEEE International Symposium on Networks-on-Chip (NOCS)
    Place of PublicationLos Alamitos
    PublisherIEEE Computer Society Press
    Number of pages2
    ISBN (Print)0-7695-3098-2
    Publication statusPublished - Apr 2008
    EventSecond ACM/IEEE International Symposium on Networks-on-Chip, NOCS - Newcastle upon Tyne
    Duration: 7 Apr 200810 Apr 2008

    Publication series

    PublisherIEEE Computer Society Press


    ConferenceSecond ACM/IEEE International Symposium on Networks-on-Chip, NOCS
    Other7-10 April 2008


    • IR-64781
    • EWI-12793
    • METIS-250991

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