This paper addresses the efficient implementation of highperformance signal-processing algorithms. In early stages of such designs many computation-intensive simulations may be necessary. This calls for hardware description formalisms targeted for efficient simulation (such as the programming language C). In current practice, other formalisms (such as VHDL) will often be used to map the design on hardware by means of logic synthesis. A manual, error-prone, translation of a description is then necessary. The line of thought of this paper is that the gap between simulation and synthesis should not be bridged by stretching the use of existing formalisms (e.g. defining a synthesizable subset of C), but by a language dedicated to an application domain. This resulted in Arx, which is meant for signal-processing hardware at the register-transfer level, either using floating-point or fixed-point data. Code generators with knowledge of the application domain then generate efficient simulation models and synthesizable VHDL. Several designers have already completed complex signal-processing designs using Arx in a short time, proving in practice that Arx is easy to learn. Benchmarks presented in this paper show that the generated simulation code is significantly faster than SystemC.
|Title of host publication||Second International Conference HiPEAC 2007|
|Place of Publication||Berlin|
|Number of pages||12|
|Publication status||Published - 28 Jan 2007|
|Name||Lecture Notes in Computer Science|
Hofstra, K. L., & Gerez, S. H. (2007). Arx: a toolset for the efficient simulation and direct synthesis of high-performance signal processing algorithms. In Second International Conference HiPEAC 2007 (pp. 215-226). [10.1007/978-3-540-69338-3_15] (Lecture Notes in Computer Science; Vol. 4367/2007). Berlin: Springer. https://doi.org/10.1007/978-3-540-69338-3_15