Back-end-of-line CMOS-compatible diode fabrication with pure boron deposition down to 50 °C

Tihomir Knežević*, Tomislav Suligoj, Xingyu Liu, Lis K. Nanver, Ahmed Elsayed, Jan F. Dick, Joerg Schulze

*Corresponding author for this work

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    Abstract

    Pure boron deposited on silicon for the formation of p+n-like junctions was studied for deposition temperatures down to 50 °C. The commonly used chemical-vapor deposition method was compared to molecular beam epitaxy with respect to the electrical characteristics and the boron-layer compactness as evaluated by etch tests, ellipsometry and atomic force microscopy. Electrically, the important parameters are minority carrier electron injection into the p-Type region and the sheet resistance along the boron-To-silicon interface which appear to be independent of deposition method for temperatures down to 300 °C. Only with molecular beam epitaxy did we succeed in producing substantial layers for the lower temperatures down to 50 °C. Also, at this very low temperature, p+n-like diodes were formed, but the suppression of electron injection was less efficient than at the higher temperatures. From simulations, assuming that the attractive electrical behavior is due to a monolayer of fixed negative charge at the interface, the concentration of holes needed to explain the I-V characteristics is estimated to be 1.4×1011 cm-2 for 50 °C deposition and 1.1×1013 cm-2 for 400 °C.

    Original languageEnglish
    Title of host publicationESSDERC 2019 - 49th European Solid-State Device Research Conference (ESSDERC)
    PublisherIEEE
    Pages242-245
    Number of pages4
    ISBN (Electronic)9781728115399
    DOIs
    Publication statusPublished - 1 Sep 2019

    Publication series

    NameEuropean Solid-State Device Research Conference
    Volume2019-September
    ISSN (Print)1930-8876

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    Keywords

    • chemical vapor deposition (CVD)
    • electron injection
    • fixed interface charge
    • molecular beam epitaxy (MBE)
    • pure antimony
    • pure boron
    • silicon diodes
    • ultra-shallow junctions

    Cite this

    Knežević, T., Suligoj, T., Liu, X., Nanver, L. K., Elsayed, A., Dick, J. F., & Schulze, J. (2019). Back-end-of-line CMOS-compatible diode fabrication with pure boron deposition down to 50 °C. In ESSDERC 2019 - 49th European Solid-State Device Research Conference (ESSDERC) (pp. 242-245). [8901810] (European Solid-State Device Research Conference; Vol. 2019-September). IEEE. https://doi.org/10.1109/ESSDERC.2019.8901810