Backwafer optical lithography and wafer distortion in substrate transfer technologies

A method has been developed by which, after removal of the bulk silicon in a substrate transfer process, the backside of a wafer (the backwafer) can be processed with the same lithography as the front side of the wafer (the frontwafer). To achieve an accurate front- to backwafer alignment accuracy, mirror symmetric alignment markers for an ASML PAS5000 waferstepper have been developed and applied in a Silicon-on-Anything process. In this manner minimum dimension low-ohmic contacts were fabricated on the backwafer. The mirror symmetric alignment markers are used in combination with standard overlay test procedures to characterize the front- to backwafer overlay accuracy. The measured overlay errors are divided up in non-mirror symmetric lens distortions and wafer distortion as a result of the substrate transfer process. The practical minimum device feature that can be realized on the backwafer is limited to 0.9-1.2 μm as a result of front- to backwafer overlay errors.