BIGFET Logic

L. Spaanenburg, R.C.C. Luchtmeyer, O.W. Memelink

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Abstract

In BIGFET logic a bipolar device is introduced in series with the driver MOS transistor using an adapted MOS process technology. The input- and output requirements of the driver component are then split over these devices: a minimum size MOS transistor giving a minimum input time constant and a bipolar transistor converting the small MOS current to the required output current. The combination results in the same driver resistance as in the original gate at an improved speed and area consumption. Additional benefits are due to novel circuit structures with a smaller gate/function ratio.

Original languageEnglish
Title of host publicationFifth European Solid State Circuits Conference - ESSCIRC 79
Place of PublicationPiscataway, NJ
PublisherIEEE
Pages155-157
Number of pages3
Edition178
ISBN (Print)0-85296-208-8
Publication statusPublished - 1979
Event5th European Solid-State Circuits Conference, ESSCIRC 1979 - Southampton, United Kingdom
Duration: 18 Sep 197921 Sep 1979
Conference number: 5

Publication series

NameIEE Conference Publication
PublisherIEEE
Volume178
ISSN (Print)0537-9989

Conference

Conference5th European Solid-State Circuits Conference, ESSCIRC 1979
Abbreviated titleESSCIRC
CountryUnited Kingdom
CitySouthampton
Period18/09/7921/09/79

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