Built-In Self-Test Methodology for A/D Converters

R. de Vries, T. Zwemstra, E.M.J.G. Bruis, P.P.L. Regtien

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    37 Citations (Scopus)
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    Abstract

    A (partial) Built-in Self-Test (BIST) methodology is proposed for analog to digital (A/D) converters. In this methodology the number of bits of the A/D converter that needs to be monitored externally in a test is reduced. This reduction depends, among other things, on the frequency of the applied test signal. At low test signal frequencies only the least significant bit (LSB) needs to be monitored and a "full" BIST becomes feasible. An analysis is made of the trade-off between the size of the on-chip test circuitry and the accuracy of this BIST technique
    Original languageEnglish
    Title of host publicationProceedings of the European Design & Test Conference ED&TC97
    Place of PublicationParis, France
    Pages353-358
    DOIs
    Publication statusPublished - 17 Mar 1997
    EventEuropean Design & Test Conference, ED&TC 1997
    : ED&TC
    - Paris, France
    Duration: 17 Mar 199720 Mar 1997

    Conference

    ConferenceEuropean Design & Test Conference, ED&TC 1997
    CountryFrance
    CityParis
    Period17/03/9720/03/97

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    Built-in self test
    Digital to analog conversion

    Cite this

    de Vries, R., Zwemstra, T., Bruis, E. M. J. G., & Regtien, P. P. L. (1997). Built-In Self-Test Methodology for A/D Converters. In Proceedings of the European Design & Test Conference ED&TC97 (pp. 353-358). Paris, France. https://doi.org/10.1109/EDTC.1997.582382
    de Vries, R. ; Zwemstra, T. ; Bruis, E.M.J.G. ; Regtien, P.P.L. / Built-In Self-Test Methodology for A/D Converters. Proceedings of the European Design & Test Conference ED&TC97. Paris, France, 1997. pp. 353-358
    @inproceedings{b28d52199f4b460e924ad3871046e772,
    title = "Built-In Self-Test Methodology for A/D Converters",
    abstract = "A (partial) Built-in Self-Test (BIST) methodology is proposed for analog to digital (A/D) converters. In this methodology the number of bits of the A/D converter that needs to be monitored externally in a test is reduced. This reduction depends, among other things, on the frequency of the applied test signal. At low test signal frequencies only the least significant bit (LSB) needs to be monitored and a {"}full{"} BIST becomes feasible. An analysis is made of the trade-off between the size of the on-chip test circuitry and the accuracy of this BIST technique",
    author = "{de Vries}, R. and T. Zwemstra and E.M.J.G. Bruis and P.P.L. Regtien",
    year = "1997",
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    doi = "10.1109/EDTC.1997.582382",
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    de Vries, R, Zwemstra, T, Bruis, EMJG & Regtien, PPL 1997, Built-In Self-Test Methodology for A/D Converters. in Proceedings of the European Design & Test Conference ED&TC97. Paris, France, pp. 353-358, European Design & Test Conference, ED&TC 1997
    , Paris, France, 17/03/97. https://doi.org/10.1109/EDTC.1997.582382

    Built-In Self-Test Methodology for A/D Converters. / de Vries, R.; Zwemstra, T.; Bruis, E.M.J.G.; Regtien, P.P.L.

    Proceedings of the European Design & Test Conference ED&TC97. Paris, France, 1997. p. 353-358.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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    de Vries R, Zwemstra T, Bruis EMJG, Regtien PPL. Built-In Self-Test Methodology for A/D Converters. In Proceedings of the European Design & Test Conference ED&TC97. Paris, France. 1997. p. 353-358 https://doi.org/10.1109/EDTC.1997.582382