Abstract
A vertically integrated alternative for integrated injection logic has been realized, named buried injector logic (BIL). 1 MeV ion implantations are used to create buried layers. The vertical pnp and npn transistors have thin base regions and exhibit a limited charge accumulation if a gate is saturated. d.c. and dynamic analysis of BIL-gate behaviour are given. A minimum gate delay of well below 1 ns is projected if collector areas are smaller than 10 μm2 within an oxide isolated structure. A relation between maximum injector current density and device size is derived.
Original language | Undefined |
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Pages (from-to) | 1243-1249 |
Journal | Solid-state electronics |
Volume | 30 |
Issue number | 12 |
DOIs | |
Publication status | Published - 1987 |
Keywords
- IR-69853