C-V characterization of MOS capacitors on high resistivity silicon substrate

B. Rong; L. K. Nanver; J. N. Burghartz; A. B M Jansman; A. G R Evans; B. S. Rejaei

doi:10.1109/ESSDERC.2003.1256920

C-V characterization of MOS capacitors on high resistivity silicon substrate

B. Rong^*, L. K. Nanver, J. N. Burghartz, A. B M Jansman, A. G R Evans, B. S. Rejaei

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

13 Citations (Scopus)

Abstract

This work reports on an investigation of capacitance-voltage (C-V) measurement of metal-oxide-semiconductor (MOS) capacitors on high resistivity silicon (HRS) used as substrate for radio-frequency (RF) integrated circuits. C-V MOS-capacitor characteristics differ considerably from those on low-resistivity silicon (LRS) due to potential drop in the substrate and large Debye length. Modeling of the substrate by a simple network of parallel resistors and capacitors is found to be insufficient at high frequencies in HRS. Medici simulations confirm the conclusions.

Original language	English
Title of host publication	ESSDERC 2003 - 33rd European Solid-State Device Research
Editors	Jose Franca, Paulo Freitas
Publisher	IEEE
Pages	489-492
Number of pages	4
ISBN (Print)	9780780379992
DOIs	https://doi.org/10.1109/ESSDERC.2003.1256920
Publication status	Published - 1 Jan 2003
Externally published	Yes
Event	33rd European Solid-State Device Research Conference, ESSDERC 2003 - Lisboa, Portugal Duration: 16 Sept 2003 → 18 Sept 2003 Conference number: 33

Conference

Conference	33rd European Solid-State Device Research Conference, ESSDERC 2003
Abbreviated title	ESSDERC
Country/Territory	Portugal
City	Lisboa
Period	16/09/03 → 18/09/03

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10.1109/ESSDERC.2003.1256920

Cite this

@inproceedings{dca3113eac2c49fd93f09e3c7c242773,

title = "C-V characterization of MOS capacitors on high resistivity silicon substrate",

abstract = "This work reports on an investigation of capacitance-voltage (C-V) measurement of metal-oxide-semiconductor (MOS) capacitors on high resistivity silicon (HRS) used as substrate for radio-frequency (RF) integrated circuits. C-V MOS-capacitor characteristics differ considerably from those on low-resistivity silicon (LRS) due to potential drop in the substrate and large Debye length. Modeling of the substrate by a simple network of parallel resistors and capacitors is found to be insufficient at high frequencies in HRS. Medici simulations confirm the conclusions.",

author = "B. Rong and Nanver, {L. K.} and Burghartz, {J. N.} and Jansman, {A. B M} and Evans, {A. G R} and Rejaei, {B. S.}",

year = "2003",

month = jan,

day = "1",

doi = "10.1109/ESSDERC.2003.1256920",

language = "English",

isbn = "9780780379992",

pages = "489--492",

editor = "Jose Franca and Paulo Freitas",

booktitle = "ESSDERC 2003 - 33rd European Solid-State Device Research",

publisher = "IEEE",

address = "United States",

note = "33rd European Solid-State Device Research Conference, ESSDERC 2003, ESSDERC ; Conference date: 16-09-2003 Through 18-09-2003",

}

Rong, B, Nanver, LK, Burghartz, JN, Jansman, ABM, Evans, AGR & Rejaei, BS 2003, C-V characterization of MOS capacitors on high resistivity silicon substrate. in J Franca & P Freitas (eds), ESSDERC 2003 - 33rd European Solid-State Device Research ., 1256920, IEEE, pp. 489-492, 33rd European Solid-State Device Research Conference, ESSDERC 2003, Lisboa, Portugal, 16/09/03. https://doi.org/10.1109/ESSDERC.2003.1256920

C-V characterization of MOS capacitors on high resistivity silicon substrate. / Rong, B.; Nanver, L. K.; Burghartz, J. N. et al.
ESSDERC 2003 - 33rd European Solid-State Device Research . ed. / Jose Franca; Paulo Freitas. IEEE, 2003. p. 489-492 1256920.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - C-V characterization of MOS capacitors on high resistivity silicon substrate

AU - Rong, B.

AU - Nanver, L. K.

AU - Burghartz, J. N.

AU - Jansman, A. B M

AU - Evans, A. G R

AU - Rejaei, B. S.

N1 - Conference code: 33

PY - 2003/1/1

Y1 - 2003/1/1

N2 - This work reports on an investigation of capacitance-voltage (C-V) measurement of metal-oxide-semiconductor (MOS) capacitors on high resistivity silicon (HRS) used as substrate for radio-frequency (RF) integrated circuits. C-V MOS-capacitor characteristics differ considerably from those on low-resistivity silicon (LRS) due to potential drop in the substrate and large Debye length. Modeling of the substrate by a simple network of parallel resistors and capacitors is found to be insufficient at high frequencies in HRS. Medici simulations confirm the conclusions.

AB - This work reports on an investigation of capacitance-voltage (C-V) measurement of metal-oxide-semiconductor (MOS) capacitors on high resistivity silicon (HRS) used as substrate for radio-frequency (RF) integrated circuits. C-V MOS-capacitor characteristics differ considerably from those on low-resistivity silicon (LRS) due to potential drop in the substrate and large Debye length. Modeling of the substrate by a simple network of parallel resistors and capacitors is found to be insufficient at high frequencies in HRS. Medici simulations confirm the conclusions.

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U2 - 10.1109/ESSDERC.2003.1256920

DO - 10.1109/ESSDERC.2003.1256920

M3 - Conference contribution

AN - SCOPUS:84907692764

SN - 9780780379992

SP - 489

EP - 492

BT - ESSDERC 2003 - 33rd European Solid-State Device Research

A2 - Franca, Jose

A2 - Freitas, Paulo

PB - IEEE

T2 - 33rd European Solid-State Device Research Conference, ESSDERC 2003

Y2 - 16 September 2003 through 18 September 2003

ER -

C-V characterization of MOS capacitors on high resistivity silicon substrate

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