C-V characterization of MOS capacitors on high resistivity silicon substrate

B. Rong*, L. K. Nanver, J. N. Burghartz, A. B M Jansman, A. G R Evans, B. S. Rejaei

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

10 Citations (Scopus)

Abstract

This work reports on an investigation of capacitance-voltage (C-V) measurement of metal-oxide-semiconductor (MOS) capacitors on high resistivity silicon (HRS) used as substrate for radio-frequency (RF) integrated circuits. C-V MOS-capacitor characteristics differ considerably from those on low-resistivity silicon (LRS) due to potential drop in the substrate and large Debye length. Modeling of the substrate by a simple network of parallel resistors and capacitors is found to be insufficient at high frequencies in HRS. Medici simulations confirm the conclusions.

Original languageEnglish
Title of host publicationESSDERC 2003 - 33rd European Solid-State Device Research
EditorsJose Franca, Paulo Freitas
PublisherIEEE Computer Society Press
Pages489-492
Number of pages4
ISBN (Print)9780780379992
DOIs
Publication statusPublished - 1 Jan 2003
Externally publishedYes
Event33rd European Solid-State Device Research Conference, ESSDERC 2003 - Lisboa, Portugal
Duration: 16 Sep 200318 Sep 2003
Conference number: 33

Conference

Conference33rd European Solid-State Device Research Conference, ESSDERC 2003
Abbreviated titleESSDERC
CountryPortugal
CityLisboa
Period16/09/0318/09/03

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