Characterization of low power radiation-hard reed-solomon code protected serializers in 65-nm for HEP experiments electronics

D. Felici, S. Bonacini, M. Ottavi

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

3 Citations (Scopus)

Abstract

The availability of low-power, radiation-resistant components has an enormous importance in the development of the electronic systems for modern detectors in a High Energy Physics (HEP) experiment. This paper describes the characterization in terms of radiation effects of two serializer blocks within a high speed transmitter, prior developed with the objective of achieving a power consumption of less than 30 mW at the operating speed of 4.8 Gbit/sec. Within the first serializer, called “simple TMR”, a traditional solution, based on the hardware redundancy, has been implemented. In the second case a new architecture, less power consuming, called “code protected”, has been proposed. The tests previously performed shown an average consumption of ~30 mW and ~19 mW, respectively, for a bit rate of 4.8 Gbit/sec but do not fully clarify if the blocks are suitable for working under extremely high radiation levels. Hence, a deep radiation hardness investigation has been performed and presented here to confirm the availability of these blocks in a HEP electronic system. SEU sensitivities are measured and bit error rates better than 2 E-15 are obtained, confirming that the “code protected” solution assures reliable communications in HEP experiments environment with a smaller power consumption. These blocks have also been designed and tested to cope with a total ionizing dose of 100 Mrad over 10 years of operation.
Original languageEnglish
Title of host publicationProceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015
DOIs
Publication statusPublished - 2015
Externally publishedYes
EventIEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2015 - Amherst, United States
Duration: 12 Oct 201514 Oct 2015

Conference

ConferenceIEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2015
Abbreviated titleDFT 2015
Country/TerritoryUnited States
CityAmherst
Period12/10/1514/10/15

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