Characterization of strained silicon FinFETs and the integration of a piezoelectric layer

B. Kaleli

    Research output: ThesisPhD Thesis - Research UT, graduation UT

    459 Downloads (Pure)

    Abstract

    Strain is often applied in semiconductor technology to improve the device performance in a field effect transistor (FET). However, it increases the off-state current as well. In this work, we investigated so-called silicon-on-insulator (SOI) fin-shaped field-effect transistors (FinFETs) and the effects of strain formed by the difference in coefficient of thermal expansion (CTE) of the used materials. Near ideal SOI FinFETs were realized in the clean room of MESA+ Institute for Nanotechnology. They served as a base for our new strained device structure: the PiezoFET. The PiezoFET is a novel device in which the channel strain can be controlled by a piezoelectric stressor to keep the off-current the same while increasing the on-current. In this device structure, PZT was used as a stressor and the effects of strain modulation due to the converse piezoelectric (piezo) effect in these devices were shown.The fabricated PiezoFET device is a good candidate for several future applications. Due to the possibility to obtain a lower and controllable SS compared to the base transistors, it can be an alternative FET design. The higher effective mobility makes it a reference point for improvement of the FinFET characteristics.
    Original languageUndefined
    Awarding Institution
    • University of Twente
    Supervisors/Advisors
    • Wolters, Robertus Adrianus Maria, Supervisor
    • Hueting, Ray, Advisor
    Thesis sponsors
    Award date20 Nov 2013
    Place of PublicationEnschede
    Publisher
    Print ISBNs978-90-365-0471-3
    DOIs
    Publication statusPublished - 20 Nov 2013

    Keywords

    • IR-87749
    • EWI-23996
    • METIS-298633

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