Charge domain filter operating up to 20 MHz clock frequency

R.A.J. Gal, Hans Wallinga

Research output: Contribution to conferencePaperAcademic

9 Downloads (Pure)

Abstract

An analog sampled data low pass third order Butterworth filter has been realised in a buried channel CCD technology. This Charge Domain Filter, composed of transversal and recursive CCD filter sections, has been tested at clock frequencies up to 20 MHz.
Original languageUndefined
Pages45-48
Publication statusPublished - 1983
Event9th European Solid-State Circuits Conference, ESSCIRC 1983 - Lausanne, Switzerland
Duration: 21 Sep 198323 Sep 1983
Conference number: 9

Conference

Conference9th European Solid-State Circuits Conference, ESSCIRC 1983
Abbreviated titleESSCIRC
CountrySwitzerland
CityLausanne
Period21/09/8323/09/83

Keywords

  • IR-96388

Cite this

Gal, R. A. J., & Wallinga, H. (1983). Charge domain filter operating up to 20 MHz clock frequency. 45-48. Paper presented at 9th European Solid-State Circuits Conference, ESSCIRC 1983, Lausanne, Switzerland.
Gal, R.A.J. ; Wallinga, Hans. / Charge domain filter operating up to 20 MHz clock frequency. Paper presented at 9th European Solid-State Circuits Conference, ESSCIRC 1983, Lausanne, Switzerland.
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title = "Charge domain filter operating up to 20 MHz clock frequency",
abstract = "An analog sampled data low pass third order Butterworth filter has been realised in a buried channel CCD technology. This Charge Domain Filter, composed of transversal and recursive CCD filter sections, has been tested at clock frequencies up to 20 MHz.",
keywords = "IR-96388",
author = "R.A.J. Gal and Hans Wallinga",
year = "1983",
language = "Undefined",
pages = "45--48",
note = "null ; Conference date: 21-09-1983 Through 23-09-1983",

}

Gal, RAJ & Wallinga, H 1983, 'Charge domain filter operating up to 20 MHz clock frequency' Paper presented at 9th European Solid-State Circuits Conference, ESSCIRC 1983, Lausanne, Switzerland, 21/09/83 - 23/09/83, pp. 45-48.

Charge domain filter operating up to 20 MHz clock frequency. / Gal, R.A.J.; Wallinga, Hans.

1983. 45-48 Paper presented at 9th European Solid-State Circuits Conference, ESSCIRC 1983, Lausanne, Switzerland.

Research output: Contribution to conferencePaperAcademic

TY - CONF

T1 - Charge domain filter operating up to 20 MHz clock frequency

AU - Gal, R.A.J.

AU - Wallinga, Hans

PY - 1983

Y1 - 1983

N2 - An analog sampled data low pass third order Butterworth filter has been realised in a buried channel CCD technology. This Charge Domain Filter, composed of transversal and recursive CCD filter sections, has been tested at clock frequencies up to 20 MHz.

AB - An analog sampled data low pass third order Butterworth filter has been realised in a buried channel CCD technology. This Charge Domain Filter, composed of transversal and recursive CCD filter sections, has been tested at clock frequencies up to 20 MHz.

KW - IR-96388

M3 - Paper

SP - 45

EP - 48

ER -

Gal RAJ, Wallinga H. Charge domain filter operating up to 20 MHz clock frequency. 1983. Paper presented at 9th European Solid-State Circuits Conference, ESSCIRC 1983, Lausanne, Switzerland.