A digital transmitter pre-emphasis technique is presented that is based on pulse-width modulation, instead of finite impulse response (FIR) filtering. The technique fits well to future high-speed low-voltage CMOS processes. A 0.13 μm CMOS transmitter achieves more than 5 Gb/s (2-PAM) over 25 m of standard RG-58U low-end coaxial copper cable. The test chip compensates for up to 33 dB of channel loss at the fundamental signaling frequency (2.5 GHz), which is the highest figure compared to literature.
|Number of pages||4|
|Publication status||Published - Jun 2005|
|Event||2005 IEEE Symposium on VLSI Circuits, VLSIC 2005 - Kyoto, Japan|
Duration: 16 Jun 2005 → 18 Jun 2005
|Conference||2005 IEEE Symposium on VLSI Circuits, VLSIC 2005|
|Period||16/06/05 → 18/06/05|
Schrader, J. H. R., Klumperink, E. A. M., Visschers, J. L., & Nauta, B. (2005). CMOS Transmitter using Pulse-Width Modulation Pre-Emphasis achieving 33dB Loss Compensation at 5-Gb/s. 388-391. Paper presented at 2005 IEEE Symposium on VLSI Circuits, VLSIC 2005, Kyoto, Japan. https://doi.org/10.1109/VLSIC.2005.1469411