CMOS Transmitter using Pulse-Width Modulation Pre-Emphasis achieving 33dB Loss Compensation at 5-Gb/s

J.H.R. Schrader, Eric A.M. Klumperink, J.L. Visschers, Bram Nauta

    Research output: Contribution to conferencePaper

    15 Citations (Scopus)
    99 Downloads (Pure)

    Abstract

    A digital transmitter pre-emphasis technique is presented that is based on pulse-width modulation, instead of finite impulse response (FIR) filtering. The technique fits well to future high-speed low-voltage CMOS processes. A 0.13 μm CMOS transmitter achieves more than 5 Gb/s (2-PAM) over 25 m of standard RG-58U low-end coaxial copper cable. The test chip compensates for up to 33 dB of channel loss at the fundamental signaling frequency (2.5 GHz), which is the highest figure compared to literature.
    Original languageEnglish
    Pages388-391
    Number of pages4
    DOIs
    Publication statusPublished - Jun 2005
    Event2005 IEEE Symposium on VLSI Circuits, VLSIC 2005 - Kyoto, Japan
    Duration: 16 Jun 200518 Jun 2005

    Conference

    Conference2005 IEEE Symposium on VLSI Circuits, VLSIC 2005
    Abbreviated titleVLSIC
    CountryJapan
    CityKyoto
    Period16/06/0518/06/05

    Keywords

    • IR-67687
    • EWI-14515

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  • Cite this

    Schrader, J. H. R., Klumperink, E. A. M., Visschers, J. L., & Nauta, B. (2005). CMOS Transmitter using Pulse-Width Modulation Pre-Emphasis achieving 33dB Loss Compensation at 5-Gb/s. 388-391. Paper presented at 2005 IEEE Symposium on VLSI Circuits, VLSIC 2005, Kyoto, Japan. https://doi.org/10.1109/VLSIC.2005.1469411