Computer-Aided Test Flow in Core-Based Design

V. Zivkovic, R.J.W.T. Tangelder, Hans G. Kerkhoff

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    Abstract

    This paper copes with the test-pattern generation and fault coverage determination in the core based design. The basic core-test strategy that one has to apply in the core-based design is stated in this work. A Computer-Aided Test (CAT) flow is proposed resulting in accurate fault coverage of embedded cores. The CAT now is applied to a few cores within the Philips Core Test Pilot IC project
    Original languageUndefined
    Title of host publication22nd International Conference on Microelectronics
    Place of PublicationNis, Yugoslavia
    PublisherIEEE
    Pages715-718
    Number of pages4
    DOIs
    Publication statusPublished - 14 May 2000
    Event22nd International Conference on Microelectronics, 2000 - Nis, Yugoslavia
    Duration: 14 May 200017 May 2000

    Publication series

    Name
    PublisherIEEE
    Volume2

    Conference

    Conference22nd International Conference on Microelectronics, 2000
    Period14/05/0017/05/00
    Other14-17 May 2000

    Keywords

    • IR-16130
    • METIS-113015

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