Current Degradation of a-Si:H/SiN TFTs at Room Temperature and Low Voltages

A.R. Merticaru, A.J. Mouthaan, F.G. Kuper

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    2 Citations (Scopus)

    Abstract

    This paper focuses on the long-term electrical degradation of hydrogenated amorphous silicon (a- Si:H)/silicon nitride (SiN) thin-film transistors (TFTs). Different from the classical method where the electrical degradation of a-Si:H/SiN TFTs is quantified by the shift of the threshold voltage after a period of stress, the authors choose to describe the degradation in terms of drain–current transients that appear during alternative periods of electrical stress. It is shown that the contributions of charge trapping and defect creation to the drain–current degradation can be discriminated based on stress time, stress voltage, and temperature. A numerical model with variable parameters is proposed to fit both short- and long-term transients. This paper shows that the long-term current degradation is related to the changes in the interface trapped charge, whereas the creation of the defects dominates the short-term current degradation.
    Original languageUndefined
    Article number10.1109/TED.2006.879673
    Pages (from-to)2273-2279
    Number of pages7
    JournalIEEE transactions on electron devices
    Volume53
    Issue number2/9
    DOIs
    Publication statusPublished - Sep 2006

    Keywords

    • EWI-6910
    • IR-63432
    • METIS-238169
    • SC-ICRY: Integrated Circuit Reliability and Yield

    Cite this

    Merticaru, A. R., Mouthaan, A. J., & Kuper, F. G. (2006). Current Degradation of a-Si:H/SiN TFTs at Room Temperature and Low Voltages. IEEE transactions on electron devices, 53(2/9), 2273-2279. [10.1109/TED.2006.879673]. https://doi.org/10.1109/TED.2006.879673