@inproceedings{d898fab060cb4b4abcf29d1b2c18a217,
title = "Cyclostationary Feature Detection on a tiled-SoC",
abstract = "In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, the tasks to be executed by each core are determined in a structured way using techniques known form the design of array processors. In the second step, the implementation of tasks on a processing core is analysed. Using this methodology, it is shown that calculating a 127 x 127 Discrete Spectral Correlation Function requires approximately 140 microseconds on a tiled System on Chip (SoC) with 4 Montium cores.",
keywords = "Reconfigurable processing, System on chip, Cognitive radio (CR), Spectrum sensing, 2023 OA procedure",
author = "Kokkeler, {Andre B.J.} and Smit, {Gerard J.M.} and Thijs Krol and Jan Kuper",
year = "2007",
month = apr,
doi = "10.1109/DATE.2007.364586",
language = "English",
isbn = "978-3-9810801-2-4",
series = "Design, Automation & Test in Europe Conference & Exhibition",
publisher = "European Design and Automation Association",
pages = "171--176",
booktitle = "2007 Design, Automation & Test in Europe Conference & Exhibition (DATE)",
note = "2007 Design, Automation & Test in Europe Conference & Exhibition, DATE 2007, DATE ; Conference date: 16-04-2007 Through 20-04-2007",
}