Cyclostationary Feature Detection on a tiled-SoC

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    3 Citations (Scopus)
    56 Downloads (Pure)

    Abstract

    In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, the tasks to be executed by each core are determined in a structured way using techniques known form the design of array processors. In the second step, the implementation of tasks on a processing core is analysed. Using this methodology, it is shown that calculating a 127 x 127 Discrete Spectral Correlation Function requires approximately 140 microseconds on a tiled System on Chip (SoC) with 4 Montium cores.
    Original languageUndefined
    Title of host publicationDATE2007 Proceedings
    PublisherEuropean Design and Automation Association
    Pages171-176
    Number of pages6
    ISBN (Print)978-3-9810801-2-4
    DOIs
    Publication statusPublished - Apr 2007
    Event2007 Design, Automation & Test in Europe Conference & Exhibition, DATE 2007 - Nice, France
    Duration: 16 Apr 200720 Apr 2007

    Publication series

    Name
    PublisherEuropean Design and Automation Association
    Number07TH8938

    Conference

    Conference2007 Design, Automation & Test in Europe Conference & Exhibition, DATE 2007
    Abbreviated titleDATE
    CountryFrance
    CityNice
    Period16/04/0720/04/07

    Keywords

    • EWI-9853
    • METIS-242169
    • Reconfigurable processing
    • IR-67112
    • System on Chip
    • Cognitive Radio
    • Spectrum Sensing

    Cite this

    Kokkeler, A. B. J., Smit, G. J. M., Krol, T., & Kuper, J. (2007). Cyclostationary Feature Detection on a tiled-SoC. In DATE2007 Proceedings (pp. 171-176). [10.1109/DATE.2007.364586] European Design and Automation Association. https://doi.org/10.1109/DATE.2007.364586
    Kokkeler, Andre B.J. ; Smit, Gerardus Johannes Maria ; Krol, Th. ; Kuper, Jan. / Cyclostationary Feature Detection on a tiled-SoC. DATE2007 Proceedings. European Design and Automation Association, 2007. pp. 171-176
    @inproceedings{d898fab060cb4b4abcf29d1b2c18a217,
    title = "Cyclostationary Feature Detection on a tiled-SoC",
    abstract = "In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, the tasks to be executed by each core are determined in a structured way using techniques known form the design of array processors. In the second step, the implementation of tasks on a processing core is analysed. Using this methodology, it is shown that calculating a 127 x 127 Discrete Spectral Correlation Function requires approximately 140 microseconds on a tiled System on Chip (SoC) with 4 Montium cores.",
    keywords = "EWI-9853, METIS-242169, Reconfigurable processing, IR-67112, System on Chip, Cognitive Radio, Spectrum Sensing",
    author = "Kokkeler, {Andre B.J.} and Smit, {Gerardus Johannes Maria} and Th. Krol and Jan Kuper",
    note = "10.1109/DATE.2007.364586",
    year = "2007",
    month = "4",
    doi = "10.1109/DATE.2007.364586",
    language = "Undefined",
    isbn = "978-3-9810801-2-4",
    publisher = "European Design and Automation Association",
    number = "07TH8938",
    pages = "171--176",
    booktitle = "DATE2007 Proceedings",

    }

    Kokkeler, ABJ, Smit, GJM, Krol, T & Kuper, J 2007, Cyclostationary Feature Detection on a tiled-SoC. in DATE2007 Proceedings., 10.1109/DATE.2007.364586, European Design and Automation Association, pp. 171-176, 2007 Design, Automation & Test in Europe Conference & Exhibition, DATE 2007, Nice, France, 16/04/07. https://doi.org/10.1109/DATE.2007.364586

    Cyclostationary Feature Detection on a tiled-SoC. / Kokkeler, Andre B.J.; Smit, Gerardus Johannes Maria; Krol, Th.; Kuper, Jan.

    DATE2007 Proceedings. European Design and Automation Association, 2007. p. 171-176 10.1109/DATE.2007.364586.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    TY - GEN

    T1 - Cyclostationary Feature Detection on a tiled-SoC

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    AU - Smit, Gerardus Johannes Maria

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    AU - Kuper, Jan

    N1 - 10.1109/DATE.2007.364586

    PY - 2007/4

    Y1 - 2007/4

    N2 - In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, the tasks to be executed by each core are determined in a structured way using techniques known form the design of array processors. In the second step, the implementation of tasks on a processing core is analysed. Using this methodology, it is shown that calculating a 127 x 127 Discrete Spectral Correlation Function requires approximately 140 microseconds on a tiled System on Chip (SoC) with 4 Montium cores.

    AB - In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, the tasks to be executed by each core are determined in a structured way using techniques known form the design of array processors. In the second step, the implementation of tasks on a processing core is analysed. Using this methodology, it is shown that calculating a 127 x 127 Discrete Spectral Correlation Function requires approximately 140 microseconds on a tiled System on Chip (SoC) with 4 Montium cores.

    KW - EWI-9853

    KW - METIS-242169

    KW - Reconfigurable processing

    KW - IR-67112

    KW - System on Chip

    KW - Cognitive Radio

    KW - Spectrum Sensing

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    PB - European Design and Automation Association

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    Kokkeler ABJ, Smit GJM, Krol T, Kuper J. Cyclostationary Feature Detection on a tiled-SoC. In DATE2007 Proceedings. European Design and Automation Association. 2007. p. 171-176. 10.1109/DATE.2007.364586 https://doi.org/10.1109/DATE.2007.364586