A data converter comprises a discrete-time sigma delta modulator e.g. for driving a Class-D power amplifier. The low-pass filter of the sigma delta modulator is modified by adding a suitably positioned pole to lower the oscillation frequency (limit cycle) of the sigma delta modulator in order to obtain increased clustering of the pulses applied to the output of the data converter.
|Patent number||US2006001561 A1|
|Publication status||Published - 5 Jan 2006|