Abstract
This paper introduces a very flexible approach for the evaluation of bit error rates (BER) attainable on storage systems which use Reed Solomon codes. These evaluations are based on the use of a Markov model to evaluate the probabilities of having an uncorrectable codeword. Differently from previous literature, the reported approach can take into account the impact of both erasures and random errors, allowing a smaller degree of approximation and better evaluation of BER improvement related to the introduction of scrubbing techniques. The flexibility of the proposed method is finally shown by applying it to different cases of interest.
Original language | English |
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Title of host publication | 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings |
Place of Publication | Piscataway, NJ |
Publisher | IEEE |
ISBN (Print) | 0-7695-2241-6 |
DOIs | |
Publication status | Published - 2004 |
Externally published | Yes |
Event | 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2004 - Cannes, France Duration: 10 Oct 2004 → 13 Oct 2004 Conference number: 19 |
Publication series
Name | IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2004 |
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Publisher | IEEE |
Number | 19 |
Volume | 2004 |
ISSN (Print) | 1550-5774 |
Conference
Conference | 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2004 |
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Abbreviated title | DFT 2004 |
Country/Territory | France |
City | Cannes |
Period | 10/10/04 → 13/10/04 |
Keywords
- Error detection/correction codes
- EDAC
- Solid state mass memories
- SSMM data integrity
- Reed Solomon codes
- Storage systems
- Bit error rates (BER)
- Markov models
- Uncorrectable codeword probability
- Random errors
- Erasure errors
- Scrubbing techniques