DC modeling of composite MOS transistors

P. de Haan, P.E. de Haan, Eric A.M. Klumperink, M.G. van Leeuwen, Hans Wallinga

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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Abstract

Mixed-signal circuit design on sea-of-gates arrays requires the use of composite MOSTs, combinations of in-series and in-parallel connected unit MOSTs. To avoid an increase in circuit simulation complexity these are in general replaced by artificial single MOSTs. The analysis in this paper shows that a straightforward replacement will lead to incorrect results. Series MOSTs (in-series connected unit MOSTs) are essentially different from single MOSTs due to the presence of diffusion areas interrupting the channel at regular distances. The influence of lateral diffusion, charge sharing, and series resistance needs to be reconsidered. The theoretical results are confirmed by measurements on an experimental IC. Parameter decks of existing MOST models for circuit level simulation can be modified easily to reflect the length dependences of composite MOST parameters.
Original languageEnglish
Title of host publicationESSDERC '95: proceedings of the 25th European Solid State Device Research Conference, 1995
Place of PublicationPiscataway, NJ, USA
PublisherIEEE
Pages801-804
Publication statusPublished - 25 Sep 1995
Event25th European Solid State Device Research Conference, ESSDERC 1995 - The Hague, Netherlands
Duration: 25 Sep 199527 Sep 1995
Conference number: 25

Publication series

Name
PublisherIEEE

Conference

Conference25th European Solid State Device Research Conference, ESSDERC 1995
Abbreviated titleESSDERC
CountryNetherlands
CityThe Hague
Period25/09/9527/09/95

Fingerprint

MOSFET devices
Networks (circuits)
Circuit simulation
Composite materials

Keywords

  • METIS-112864
  • IR-96426

Cite this

de Haan, P., de Haan, P. E., Klumperink, E. A. M., van Leeuwen, M. G., & Wallinga, H. (1995). DC modeling of composite MOS transistors. In ESSDERC '95: proceedings of the 25th European Solid State Device Research Conference, 1995 (pp. 801-804). Piscataway, NJ, USA: IEEE.
de Haan, P. ; de Haan, P.E. ; Klumperink, Eric A.M. ; van Leeuwen, M.G. ; Wallinga, Hans. / DC modeling of composite MOS transistors. ESSDERC '95: proceedings of the 25th European Solid State Device Research Conference, 1995. Piscataway, NJ, USA : IEEE, 1995. pp. 801-804
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abstract = "Mixed-signal circuit design on sea-of-gates arrays requires the use of composite MOSTs, combinations of in-series and in-parallel connected unit MOSTs. To avoid an increase in circuit simulation complexity these are in general replaced by artificial single MOSTs. The analysis in this paper shows that a straightforward replacement will lead to incorrect results. Series MOSTs (in-series connected unit MOSTs) are essentially different from single MOSTs due to the presence of diffusion areas interrupting the channel at regular distances. The influence of lateral diffusion, charge sharing, and series resistance needs to be reconsidered. The theoretical results are confirmed by measurements on an experimental IC. Parameter decks of existing MOST models for circuit level simulation can be modified easily to reflect the length dependences of composite MOST parameters.",
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de Haan, P, de Haan, PE, Klumperink, EAM, van Leeuwen, MG & Wallinga, H 1995, DC modeling of composite MOS transistors. in ESSDERC '95: proceedings of the 25th European Solid State Device Research Conference, 1995. IEEE, Piscataway, NJ, USA, pp. 801-804, 25th European Solid State Device Research Conference, ESSDERC 1995, The Hague, Netherlands, 25/09/95.

DC modeling of composite MOS transistors. / de Haan, P.; de Haan, P.E.; Klumperink, Eric A.M.; van Leeuwen, M.G.; Wallinga, Hans.

ESSDERC '95: proceedings of the 25th European Solid State Device Research Conference, 1995. Piscataway, NJ, USA : IEEE, 1995. p. 801-804.

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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T1 - DC modeling of composite MOS transistors

AU - de Haan, P.

AU - de Haan, P.E.

AU - Klumperink, Eric A.M.

AU - van Leeuwen, M.G.

AU - Wallinga, Hans

PY - 1995/9/25

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N2 - Mixed-signal circuit design on sea-of-gates arrays requires the use of composite MOSTs, combinations of in-series and in-parallel connected unit MOSTs. To avoid an increase in circuit simulation complexity these are in general replaced by artificial single MOSTs. The analysis in this paper shows that a straightforward replacement will lead to incorrect results. Series MOSTs (in-series connected unit MOSTs) are essentially different from single MOSTs due to the presence of diffusion areas interrupting the channel at regular distances. The influence of lateral diffusion, charge sharing, and series resistance needs to be reconsidered. The theoretical results are confirmed by measurements on an experimental IC. Parameter decks of existing MOST models for circuit level simulation can be modified easily to reflect the length dependences of composite MOST parameters.

AB - Mixed-signal circuit design on sea-of-gates arrays requires the use of composite MOSTs, combinations of in-series and in-parallel connected unit MOSTs. To avoid an increase in circuit simulation complexity these are in general replaced by artificial single MOSTs. The analysis in this paper shows that a straightforward replacement will lead to incorrect results. Series MOSTs (in-series connected unit MOSTs) are essentially different from single MOSTs due to the presence of diffusion areas interrupting the channel at regular distances. The influence of lateral diffusion, charge sharing, and series resistance needs to be reconsidered. The theoretical results are confirmed by measurements on an experimental IC. Parameter decks of existing MOST models for circuit level simulation can be modified easily to reflect the length dependences of composite MOST parameters.

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de Haan P, de Haan PE, Klumperink EAM, van Leeuwen MG, Wallinga H. DC modeling of composite MOS transistors. In ESSDERC '95: proceedings of the 25th European Solid State Device Research Conference, 1995. Piscataway, NJ, USA: IEEE. 1995. p. 801-804