Dealing with hot-carrier aging in nMOS and DMOS, models, simulations and characterizations

A.J. Mouthaan; Cora Salm; M.M. Lunenborg; M.M. Lunenborg; Marc de Wolf; M.A.R.C. de Wolf; F.G. Kuper

doi:10.1016/S0026-2714(99)00252-8

Dealing with hot-carrier aging in nMOS and DMOS, models, simulations and characterizations

A.J. Mouthaan, Cora Salm, M.M. Lunenborg, M.M. Lunenborg, Marc de Wolf, M.A.R.C. de Wolf, F.G. Kuper

Research output: Contribution to journal › Article › Academic › peer-review

19 Citations (Scopus)

Abstract

Circuit aging simulation is seen as a true enhancement to device and circuit simulation. To predict aging of circuit performance, tested models for device parameters are needed in which the change in device behavior as function of time, given the biasing and temperature condition of the device in the circuit, is correctly modeled. The time scale here is the lifetime of the product. A circuit simulator in the transient mode can predict circuit aging using a transformation of the dc/ac biasing situation with an appropriate scaling mechanism. Device aging models that can be implemented in such a circuit simulator are presented here for nMOS and DMOS (double diffused MOS) based on measurements and empirical modeling.

Original language	Undefined
Pages (from-to)	909-917
Number of pages	9
Journal	Microelectronics reliability
Volume	2000
Issue number	6
DOIs	https://doi.org/10.1016/S0026-2714(99)00252-8
Publication status	Published - 2000

Keywords

METIS-111626
IR-74341

Access to Document

10.1016/S0026-2714(99)00252-8

Cite this

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title = "Dealing with hot-carrier aging in nMOS and DMOS, models, simulations and characterizations",

abstract = "Circuit aging simulation is seen as a true enhancement to device and circuit simulation. To predict aging of circuit performance, tested models for device parameters are needed in which the change in device behavior as function of time, given the biasing and temperature condition of the device in the circuit, is correctly modeled. The time scale here is the lifetime of the product. A circuit simulator in the transient mode can predict circuit aging using a transformation of the dc/ac biasing situation with an appropriate scaling mechanism. Device aging models that can be implemented in such a circuit simulator are presented here for nMOS and DMOS (double diffused MOS) based on measurements and empirical modeling.",

keywords = "METIS-111626, IR-74341",

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year = "2000",

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T1 - Dealing with hot-carrier aging in nMOS and DMOS, models, simulations and characterizations

AU - Mouthaan, A.J.

AU - Salm, Cora

AU - Lunenborg, M.M.

AU - de Wolf, Marc

AU - de Wolf, M.A.R.C.

AU - Kuper, F.G.

PY - 2000

Y1 - 2000

N2 - Circuit aging simulation is seen as a true enhancement to device and circuit simulation. To predict aging of circuit performance, tested models for device parameters are needed in which the change in device behavior as function of time, given the biasing and temperature condition of the device in the circuit, is correctly modeled. The time scale here is the lifetime of the product. A circuit simulator in the transient mode can predict circuit aging using a transformation of the dc/ac biasing situation with an appropriate scaling mechanism. Device aging models that can be implemented in such a circuit simulator are presented here for nMOS and DMOS (double diffused MOS) based on measurements and empirical modeling.

AB - Circuit aging simulation is seen as a true enhancement to device and circuit simulation. To predict aging of circuit performance, tested models for device parameters are needed in which the change in device behavior as function of time, given the biasing and temperature condition of the device in the circuit, is correctly modeled. The time scale here is the lifetime of the product. A circuit simulator in the transient mode can predict circuit aging using a transformation of the dc/ac biasing situation with an appropriate scaling mechanism. Device aging models that can be implemented in such a circuit simulator are presented here for nMOS and DMOS (double diffused MOS) based on measurements and empirical modeling.

KW - METIS-111626

KW - IR-74341

U2 - 10.1016/S0026-2714(99)00252-8

DO - 10.1016/S0026-2714(99)00252-8

M3 - Article

VL - 2000

SP - 909

EP - 917

JO - Microelectronics reliability

JF - Microelectronics reliability

SN - 0026-2714

IS - 6

ER -