Degenerated differential pair with controllable transconductance

Clemens Mensink; Clemens H.J. Mensink; Bram Nauta

Degenerated differential pair with controllable transconductance

Clemens Mensink (Inventor), Clemens H.J. Mensink (Inventor), Bram Nauta (Inventor)

Research output: Patent

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Abstract

A differential pair with input transistors and provided with a variable degeneration resistor. The degeneration resistor comprises a series arrangement of two branches of coupled resistors which are shunted in mutually corresponding points by respective control transistors whose gates are interconnected. The differential pair further comprises a control loop comprising two current mirrors a bias resistor and a current source for providing a control signal to the gates of the control transistors. The control loop does not influence the DC bias of the differential pair

Original language	Undefined
Patent number	US5828265
Priority date	9/05/96
Publication status	Published - 27 Oct 1998

Keywords

METIS-118316
EWI-27522
IR-102630

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https://worldwide.espacenet.com/publicationDetails/originalDocument?FT=D&date=19981027&DB=&locale=&CC=US&NR=5828265A&KC=A&ND=1#

1 Patent

Degenerated differential pair with controllable transconductance
Mensink, C. & Nauta, B., 14 Nov 2001, Patent No. 1e Europe EP0836766(B1), Priority date 9 May 1996, Priority No. EP96201256
Research output: Patent

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Cite this

@misc{d01e95b2b3344cd6996e7e1962dc600b,

title = "Degenerated differential pair with controllable transconductance",

abstract = "A differential pair with input transistors and provided with a variable degeneration resistor. The degeneration resistor comprises a series arrangement of two branches of coupled resistors which are shunted in mutually corresponding points by respective control transistors whose gates are interconnected. The differential pair further comprises a control loop comprising two current mirrors a bias resistor and a current source for providing a control signal to the gates of the control transistors. The control loop does not influence the DC bias of the differential pair",

keywords = "METIS-118316, EWI-27522, IR-102630",

author = "Clemens Mensink and Mensink, {Clemens H.J.} and Bram Nauta",

note = "Aanvraag octrooi door Derden (27-10-1998) ; US5828265",

year = "1998",

month = oct,

day = "27",

language = "Undefined",

type = "Patent",

}

TY - PAT

T1 - Degenerated differential pair with controllable transconductance

AU - Mensink, Clemens

AU - Mensink, Clemens H.J.

AU - Nauta, Bram

N1 - Aanvraag octrooi door Derden (27-10-1998)

PY - 1998/10/27

Y1 - 1998/10/27

N2 - A differential pair with input transistors and provided with a variable degeneration resistor. The degeneration resistor comprises a series arrangement of two branches of coupled resistors which are shunted in mutually corresponding points by respective control transistors whose gates are interconnected. The differential pair further comprises a control loop comprising two current mirrors a bias resistor and a current source for providing a control signal to the gates of the control transistors. The control loop does not influence the DC bias of the differential pair

AB - A differential pair with input transistors and provided with a variable degeneration resistor. The degeneration resistor comprises a series arrangement of two branches of coupled resistors which are shunted in mutually corresponding points by respective control transistors whose gates are interconnected. The differential pair further comprises a control loop comprising two current mirrors a bias resistor and a current source for providing a control signal to the gates of the control transistors. The control loop does not influence the DC bias of the differential pair

KW - METIS-118316

KW - EWI-27522

KW - IR-102630

M3 - Patent

M1 - US5828265

ER -