Design and characterisation of high-performance 0.13 μm NMOS Devices

J. Schmitz*, G.M. Paulzen, D.J. Gravesteijn, A.H. Montree, P.H. Woerlee

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

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Abstract

We report on the design, manufacturing and performance of NMOS transistors optimised or an effective channel length of 0.13 μm. The influence of the gate oxide thickness and pocket implants to device performance was studied. Pocket implanted devices show a high drive current (530 μA/μm at 1.8 V) and low off-current, with good suppression of short channel effects and a lifetime of 10 years at 1.8 V.

Original languageEnglish
Title of host publicationESSDERC 1996
Subtitle of host publicationProceedings of the 26th European Solid State Device Research Conference
EditorsMassimo Rudan, Giorgio Baccarani
Place of PublicationPiscataway, NJ
PublisherIEEE Computer Society
Pages329-332
Number of pages4
ISBN (Print)9782863321966
Publication statusPublished - 1 Jan 1996
Externally publishedYes
Event26th European Solid State Device Research Conference, ESSDERC 1996 - Bologna, Italy
Duration: 9 Sep 199611 Sep 1996
Conference number: 26

Conference

Conference26th European Solid State Device Research Conference, ESSDERC 1996
Abbreviated titleESSDERC
CountryItaly
CityBologna
Period9/09/9611/09/96

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