Abstract
This paper describes the design and characterization of a safety critical module for Eurobalise railway signalling. The design of the module is done on a HW/SW platform to include compliance to the safety regulations both at HW and SW level. The safety of the obtained design implemented on FPGA is then characterized through a fault injection campaign. The fault injection campaign isolated some corner cases suggesting optimization of the design. The novelty of our work is the use of fault injection on FPGA based platforms to characterize and optimize the design flow of a safety critical system thus adding an extra layer of ex-post characterization of designs implemented in compliance to safety-driven standards.
Original language | English |
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Title of host publication | 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016 |
DOIs | |
Publication status | Published - 2016 |
Externally published | Yes |
Event | 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016 - University of Connecticut, Storrs, United States Duration: 19 Sept 2016 → 20 Sept 2016 |
Conference
Conference | 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016 |
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Abbreviated title | DFT |
Country/Territory | United States |
City | Storrs |
Period | 19/09/16 → 20/09/16 |