@techreport{bcef68ce857f48bcaaf75256cea55a45,
title = "Design and Experimental Investigation of Trikarenos: A Fault-Tolerant 28nm RISC-V-based SoC",
abstract = " We present a fault-tolerant by-design RISC-V SoC and experimentally assess it under atmospheric neutrons and 200 MeV protons. The dedicated ECC and Triple-Core Lockstep countermeasures correct most errors, guaranteeing a device cross-section lower than $5.36 \times 10^{-12}$ cm$^2$. ",
keywords = "physics.ins-det, cs.AR, hep-ex",
author = "Michael Rogenmoser and Philip Wiese and Forlin, {Bruno Endres} and G{\"u}rkaynak, {Frank K.} and Paolo Rech and Alessandra Menicucci and Marco Ottavi and Luca Benini",
note = "4 pages (excluding title page), accepted at RADECS 2024",
year = "2024",
month = jul,
day = "8",
doi = "10.48550/arXiv.2407.05938",
language = "English",
publisher = "ArXiv.org",
type = "WorkingPaper",
institution = "ArXiv.org",
}