Design and Implementation of a Dependable CPSoC for Automotive Applications

Ghazanfar Ali, Hassan Ebrahimi, Jerrin Pathrose Vareed, Hans G. Kerkhoff

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    2 Citations (Scopus)
    1 Downloads (Pure)


    Safety-critical cyber-physical systems-on-chip, consisting of analog/mixed-signal front- and back-ends combined with massive digital many-processor cores, are being increasingly applied. The imminent collision detection chip for cars is an example of this and such a complex system requires zero downtime and a very high dependability. By on-line monitoring the health status of processor cores and IPs and taking counteractions, we have accomplished this goal via IJTAG-compatible embedded instruments and appropriate embedded software. An IJTAG-compatible Iddt monitor has been designed, a slack-delay embedded instrument for detecting timing issues, as well as a monitor for detecting intermitted resistive faults in interconnections. By the on-chip replacement of degraded (non-healthy) cores, the lifetime can be increased by a factor of around four of our mixed-signal cyber-physical systems-on-chip.
    Original languageEnglish
    Title of host publication2018 IEEE Industrial Cyber-Physical Systems (ICPS)
    Number of pages6
    ISBN (Electronic)978-1-5386-6531-2
    Publication statusPublished - Jun 2018
    Event1st IEEE International Conference on Industrial Cyber-Physical Systems, ICPS 2018 - ITMO University, Saint-Petersburg, Russian Federation
    Duration: 15 May 201818 May 2018
    Conference number: 1


    Conference1st IEEE International Conference on Industrial Cyber-Physical Systems, ICPS 2018
    Abbreviated titleICPS 2018
    Country/TerritoryRussian Federation
    Internet address


    • cyber-physical systems
    • Dependability
    • IDDT & slack-delay and IRF monitors
    • IJTAG embedded instruments

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