Design of a High-Performance Programmable Architecture for Processing ATM Adaption Layer Protocols

H.W.A. Teunissen; S.M. Heemstra de Groot; A. Anton; E. Villar; D.B. de Vries

Design of a High-Performance Programmable Architecture for Processing ATM Adaption Layer Protocols

H.W.A. Teunissen, S.M. Heemstra de Groot, A. Anton, E. Villar, D.B. de Vries

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Original language	English
Title of host publication	Proceedings of the ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing
Subtitle of host publication	Mierlo, The Netherlands, November 27-28, 1996
Editors	Jean Pierre Veen
Place of Publication	Mierlo
Publisher	STW
Pages	343-348
Number of pages	6
ISBN (Print)	90-73461-09-X
Publication status	Published - 16 Jan 1996
Event	7th ProRISC/IEEE workshop on Circuits, Systems and Signal Processing, CSSP 1996 - Mierlo, Netherlands Duration: 27 Nov 1996 → 28 Nov 1996 Conference number: 7

Conference

Conference	7th ProRISC/IEEE workshop on Circuits, Systems and Signal Processing, CSSP 1996
Abbreviated title	CSSP
Country/Territory	Netherlands
City	Mierlo
Period	27/11/96 → 28/11/96

Cite this

Teunissen, H. W. A., Heemstra de Groot, S. M., Anton, A., Villar, E., & de Vries, D. B. (1996). Design of a High-Performance Programmable Architecture for Processing ATM Adaption Layer Protocols. In J. P. Veen (Ed.), Proceedings of the ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing: Mierlo, The Netherlands, November 27-28, 1996 (pp. 343-348). STW.

Teunissen, H.W.A. ; Heemstra de Groot, S.M. ; Anton, A. ; Villar, E. ; de Vries, D.B. / Design of a High-Performance Programmable Architecture for Processing ATM Adaption Layer Protocols. Proceedings of the ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing: Mierlo, The Netherlands, November 27-28, 1996. editor / Jean Pierre Veen. Mierlo : STW, 1996. pp. 343-348

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title = "Design of a High-Performance Programmable Architecture for Processing ATM Adaption Layer Protocols",

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year = "1996",

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isbn = "90-73461-09-X",

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booktitle = "Proceedings of the ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing",

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Teunissen, HWA, Heemstra de Groot, SM, Anton, A, Villar, E & de Vries, DB 1996, Design of a High-Performance Programmable Architecture for Processing ATM Adaption Layer Protocols. in JP Veen (ed.), Proceedings of the ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing: Mierlo, The Netherlands, November 27-28, 1996. STW, Mierlo, pp. 343-348, 7th ProRISC/IEEE workshop on Circuits, Systems and Signal Processing, CSSP 1996, Mierlo, Netherlands, 27/11/96.

Design of a High-Performance Programmable Architecture for Processing ATM Adaption Layer Protocols. / Teunissen, H.W.A.; Heemstra de Groot, S.M.; Anton, A.; Villar, E.; de Vries, D.B.

Proceedings of the ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing: Mierlo, The Netherlands, November 27-28, 1996. ed. / Jean Pierre Veen. Mierlo : STW, 1996. p. 343-348.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Design of a High-Performance Programmable Architecture for Processing ATM Adaption Layer Protocols

AU - Teunissen, H.W.A.

AU - Heemstra de Groot, S.M.

AU - Anton, A.

AU - Villar, E.

AU - de Vries, D.B.

N1 - Conference code: 7

PY - 1996/1/16

Y1 - 1996/1/16

M3 - Conference contribution

SN - 90-73461-09-X

SP - 343

EP - 348

BT - Proceedings of the ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing

A2 - Veen, Jean Pierre

PB - STW

CY - Mierlo

T2 - 7th ProRISC/IEEE workshop on Circuits, Systems and Signal Processing, CSSP 1996

Y2 - 27 November 1996 through 28 November 1996

ER -