Design procedure for integrated microwave GaAs stacked-FET high-power amplifiers

Gijs van der Bent; Peter de Hek; Frank E. van Vliet

doi:10.1109/TMTT.2019.2927562

Design procedure for integrated microwave GaAs stacked-FET high-power amplifiers

Gijs van der Bent^*, Peter de Hek, Frank E. van Vliet

^*Corresponding author for this work

Integrated Circuit Design

Research output: Contribution to journal › Article › Academic › peer-review

6 Citations (Scopus)

1 Downloads (Pure)

Abstract

The application of stacked-FETs in power amplifiers allows for a supply voltage higher than supported by the breakdown voltage of a single transistor. Potential benefits of the increased supply voltage are reduced supply currents and a lower matching ratio at the output of the amplifier. Furthermore, an increased output power per chip area is obtained due to the reduction in passive structures resulting in more area-efficient power combining. In this paper, the procedure for the design of integrated microwave stacked-FET is discussed. Several options for the correct distribution of RF voltage and current swings are investigated and the relationship between the number of stacked transistors and bandwidth is addressed. The procedure is demonstrated by the design of an S-band GaAs stacked-FET containing three transistors. This stacked-FET is applied in an S-band HPA that has a PAE of more than 40% at an output power of 20 W, which is more than twice the output power of any previously reported GaAs stacked-FET HPA.

Original language	English
Article number	8778700
Pages (from-to)	3716-3731
Number of pages	16
Journal	IEEE transactions on microwave theory and techniques
Volume	67
Issue number	9
DOIs	https://doi.org/10.1109/TMTT.2019.2927562
Publication status	Published - Sep 2019

Keywords

Microwave-integrated circuits
Nonlinear circuits
Power-integrated circuits
Radio frequency (RF) signals
Transmitters
n/a OA procedure

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10.1109/TMTT.2019.2927562

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title = "Design procedure for integrated microwave GaAs stacked-FET high-power amplifiers",

abstract = "The application of stacked-FETs in power amplifiers allows for a supply voltage higher than supported by the breakdown voltage of a single transistor. Potential benefits of the increased supply voltage are reduced supply currents and a lower matching ratio at the output of the amplifier. Furthermore, an increased output power per chip area is obtained due to the reduction in passive structures resulting in more area-efficient power combining. In this paper, the procedure for the design of integrated microwave stacked-FET is discussed. Several options for the correct distribution of RF voltage and current swings are investigated and the relationship between the number of stacked transistors and bandwidth is addressed. The procedure is demonstrated by the design of an S-band GaAs stacked-FET containing three transistors. This stacked-FET is applied in an S-band HPA that has a PAE of more than 40% at an output power of 20 W, which is more than twice the output power of any previously reported GaAs stacked-FET HPA.",

keywords = "Microwave-integrated circuits, Nonlinear circuits, Power-integrated circuits, Radio frequency (RF) signals, Transmitters, n/a OA procedure",

author = "{van der Bent}, Gijs and {de Hek}, Peter and {van Vliet}, {Frank E.}",

note = "Funding Information: Manuscript received December 21, 2018; revised March 18, 2019 and June 5, 2019; accepted June 13, 2019. Date of publication July 29, 2019; date of current version September 4, 2019. The work was supported by the Dutch Radar Centre of Expertise (DRACE), which is a strategic alliance of Thales Netherlands and TNO. (Corresponding author: Gijs van der Bent.) G. van der Bent and P. de Hek are with TNO, 2597 AK The Hague, The Netherlands (e-mail: gijs.vanderbent@tno.nl; peter.dehek@tno.nl). Publisher Copyright: {\textcopyright} 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.",

year = "2019",

month = sep,

doi = "10.1109/TMTT.2019.2927562",

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AU - van der Bent, Gijs

AU - de Hek, Peter

AU - van Vliet, Frank E.

N1 - Funding Information: Manuscript received December 21, 2018; revised March 18, 2019 and June 5, 2019; accepted June 13, 2019. Date of publication July 29, 2019; date of current version September 4, 2019. The work was supported by the Dutch Radar Centre of Expertise (DRACE), which is a strategic alliance of Thales Netherlands and TNO. (Corresponding author: Gijs van der Bent.) G. van der Bent and P. de Hek are with TNO, 2597 AK The Hague, The Netherlands (e-mail: gijs.vanderbent@tno.nl; peter.dehek@tno.nl). Publisher Copyright: © 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

PY - 2019/9

Y1 - 2019/9

N2 - The application of stacked-FETs in power amplifiers allows for a supply voltage higher than supported by the breakdown voltage of a single transistor. Potential benefits of the increased supply voltage are reduced supply currents and a lower matching ratio at the output of the amplifier. Furthermore, an increased output power per chip area is obtained due to the reduction in passive structures resulting in more area-efficient power combining. In this paper, the procedure for the design of integrated microwave stacked-FET is discussed. Several options for the correct distribution of RF voltage and current swings are investigated and the relationship between the number of stacked transistors and bandwidth is addressed. The procedure is demonstrated by the design of an S-band GaAs stacked-FET containing three transistors. This stacked-FET is applied in an S-band HPA that has a PAE of more than 40% at an output power of 20 W, which is more than twice the output power of any previously reported GaAs stacked-FET HPA.

AB - The application of stacked-FETs in power amplifiers allows for a supply voltage higher than supported by the breakdown voltage of a single transistor. Potential benefits of the increased supply voltage are reduced supply currents and a lower matching ratio at the output of the amplifier. Furthermore, an increased output power per chip area is obtained due to the reduction in passive structures resulting in more area-efficient power combining. In this paper, the procedure for the design of integrated microwave stacked-FET is discussed. Several options for the correct distribution of RF voltage and current swings are investigated and the relationship between the number of stacked transistors and bandwidth is addressed. The procedure is demonstrated by the design of an S-band GaAs stacked-FET containing three transistors. This stacked-FET is applied in an S-band HPA that has a PAE of more than 40% at an output power of 20 W, which is more than twice the output power of any previously reported GaAs stacked-FET HPA.

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Design procedure for integrated microwave GaAs stacked-FET high-power amplifiers

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