Designing a dataflow processor using CλaSH

A. Niedermeier, Rinse Wester, Rinse Wester, K.C. Rovers, C.P.R. Baaij, Jan Kuper, Gerardus Johannes Maria Smit

Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 1 Citations

Abstract

In this paper we show how a simple dataflow processor can be fully implemented using CλaSH, a high level HDL based on the functional programming language Haskell. The processor was described using Haskell, the CλaSH compiler was then used to translate the design into a fully synthesisable VHDL code. The VHDL code was synthesised with 90 nm TSMC libraries and placed and routed. Simulation of the final netlist showed correct behaviour. We conclude that Haskell and CλaSH are well-suited to define hardware on a very high level of abstraction which is close to the mathematical description of the desired architecture. By using CλaSH, the designer does not have to care about internal implementation details like when designing with VHDL. The complete processor was described in 300 lines of code, some snippets are shown as illustration.
LanguageUndefined
Title of host publication28th Norchip Conference, NORCHIP 2010
PublisherIEEE Circuits & Systems Society
Pages69
Number of pages4
ISBN (Print)978-1-4244-8971-8
DOIs
StatePublished - 15 Nov 2010

Publication series

Name
PublisherIEEE Circuits & Systems Society

Keywords

  • IR-74963
  • EWI-18904
  • METIS-271151

Cite this

Niedermeier, A., Wester, R., Wester, R., Rovers, K. C., Baaij, C. P. R., Kuper, J., & Smit, G. J. M. (2010). Designing a dataflow processor using CλaSH. In 28th Norchip Conference, NORCHIP 2010 (pp. 69). IEEE Circuits & Systems Society. DOI: 10.1109/NORCHIP.2010.5669445
Niedermeier, A. ; Wester, Rinse ; Wester, Rinse ; Rovers, K.C. ; Baaij, C.P.R. ; Kuper, Jan ; Smit, Gerardus Johannes Maria. / Designing a dataflow processor using CλaSH. 28th Norchip Conference, NORCHIP 2010. IEEE Circuits & Systems Society, 2010. pp. 69
@inproceedings{25caba8a2fd04689adeba1d937fc3a40,
title = "Designing a dataflow processor using CλaSH",
abstract = "In this paper we show how a simple dataflow processor can be fully implemented using CλaSH, a high level HDL based on the functional programming language Haskell. The processor was described using Haskell, the CλaSH compiler was then used to translate the design into a fully synthesisable VHDL code. The VHDL code was synthesised with 90 nm TSMC libraries and placed and routed. Simulation of the final netlist showed correct behaviour. We conclude that Haskell and CλaSH are well-suited to define hardware on a very high level of abstraction which is close to the mathematical description of the desired architecture. By using CλaSH, the designer does not have to care about internal implementation details like when designing with VHDL. The complete processor was described in 300 lines of code, some snippets are shown as illustration.",
keywords = "IR-74963, EWI-18904, METIS-271151",
author = "A. Niedermeier and Rinse Wester and Rinse Wester and K.C. Rovers and C.P.R. Baaij and Jan Kuper and Smit, {Gerardus Johannes Maria}",
year = "2010",
month = "11",
day = "15",
doi = "10.1109/NORCHIP.2010.5669445",
language = "Undefined",
isbn = "978-1-4244-8971-8",
publisher = "IEEE Circuits & Systems Society",
pages = "69",
booktitle = "28th Norchip Conference, NORCHIP 2010",

}

Niedermeier, A, Wester, R, Wester, R, Rovers, KC, Baaij, CPR, Kuper, J & Smit, GJM 2010, Designing a dataflow processor using CλaSH. in 28th Norchip Conference, NORCHIP 2010. IEEE Circuits & Systems Society, pp. 69. DOI: 10.1109/NORCHIP.2010.5669445

Designing a dataflow processor using CλaSH. / Niedermeier, A.; Wester, Rinse; Wester, Rinse; Rovers, K.C.; Baaij, C.P.R.; Kuper, Jan; Smit, Gerardus Johannes Maria.

28th Norchip Conference, NORCHIP 2010. IEEE Circuits & Systems Society, 2010. p. 69.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Designing a dataflow processor using CλaSH

AU - Niedermeier,A.

AU - Wester,Rinse

AU - Wester,Rinse

AU - Rovers,K.C.

AU - Baaij,C.P.R.

AU - Kuper,Jan

AU - Smit,Gerardus Johannes Maria

PY - 2010/11/15

Y1 - 2010/11/15

N2 - In this paper we show how a simple dataflow processor can be fully implemented using CλaSH, a high level HDL based on the functional programming language Haskell. The processor was described using Haskell, the CλaSH compiler was then used to translate the design into a fully synthesisable VHDL code. The VHDL code was synthesised with 90 nm TSMC libraries and placed and routed. Simulation of the final netlist showed correct behaviour. We conclude that Haskell and CλaSH are well-suited to define hardware on a very high level of abstraction which is close to the mathematical description of the desired architecture. By using CλaSH, the designer does not have to care about internal implementation details like when designing with VHDL. The complete processor was described in 300 lines of code, some snippets are shown as illustration.

AB - In this paper we show how a simple dataflow processor can be fully implemented using CλaSH, a high level HDL based on the functional programming language Haskell. The processor was described using Haskell, the CλaSH compiler was then used to translate the design into a fully synthesisable VHDL code. The VHDL code was synthesised with 90 nm TSMC libraries and placed and routed. Simulation of the final netlist showed correct behaviour. We conclude that Haskell and CλaSH are well-suited to define hardware on a very high level of abstraction which is close to the mathematical description of the desired architecture. By using CλaSH, the designer does not have to care about internal implementation details like when designing with VHDL. The complete processor was described in 300 lines of code, some snippets are shown as illustration.

KW - IR-74963

KW - EWI-18904

KW - METIS-271151

U2 - 10.1109/NORCHIP.2010.5669445

DO - 10.1109/NORCHIP.2010.5669445

M3 - Conference contribution

SN - 978-1-4244-8971-8

SP - 69

BT - 28th Norchip Conference, NORCHIP 2010

PB - IEEE Circuits & Systems Society

ER -

Niedermeier A, Wester R, Wester R, Rovers KC, Baaij CPR, Kuper J et al. Designing a dataflow processor using CλaSH. In 28th Norchip Conference, NORCHIP 2010. IEEE Circuits & Systems Society. 2010. p. 69. Available from, DOI: 10.1109/NORCHIP.2010.5669445