Developing an Integrated Design Strategy for Chip Layout Optimization

Wessel Willems Wits, Juan Manuel Jauregui Becker, Frank Edward van Vliet, G.J. te Riele

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This paper presents an integrated design strategy for chip layout optimization. The strategy couples both electric and thermal aspects during the conceptual design phase to improve chip performances; thermal management being one of the major topics. The layout of the chip circuitry is optimized according to the proposed design rules. This offers chip layout designers an intuitive way to optimize the layout for multiple performance indicators, such as temperature, RF power output or amplifier gain. In a case study, the strategy proposed a chip redesign, boosting overall chip performance without compromising the current cooling infrastructure. The developed integrated design strategy presents a new and time-efficient approach to chip layout optimization and electronics cooling in general.
Original languageUndefined
Publication statusPublished - 2011
Event21st CIRP Design Conference 2011 - Daejeon, Korea, Republic of
Duration: 27 Feb 201129 Mar 2011
Conference number: 21


Conference21st CIRP Design Conference 2011
Country/TerritoryKorea, Republic of


  • Integrated design strategy
  • Layout design
  • Electronics cooling
  • Chip layout optimization
  • Thermal management
  • IR-76874

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