Device scaling has been a subject of research for both optoelectronics and electronics. In order to investigate the electronic properties of scaled devices we characterized lateral p-i-n structures using thin silicon on insulator (SOI) layers of varying dimension. With the help of these structures we try to explain the size dependencies on electronic transport properties. Further, we also studied different ways to fabricate silicon lines/fins.
|Publisher||Technology Foundation STW|
|Workshop||10th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2007|
|Period||29/11/07 → 30/11/07|
- SC-ICF: Integrated Circuit Fabrication