Distortion compensator

K. Sakamoto (Inventor), Bram Nauta (Inventor)

    Research output: Patent

    23 Downloads (Pure)

    Abstract

    PROBLEM TO BE SOLVED: To improve distortion compensation accuracy of a power amplifier. :SOLUTION: An LMS algorithm using a feedback signal that is an output signal of a power amplifier 1 input via an attenuator 15 and pseudorandom data calculates a delay of an input signal to the power amplifier 1. A delay of an input signal to the power amplifier 1 is adjusted on the basis of the calculated delay to match timing of the input signal to the power amplifier 1 with a feedback signal including a fractional delay, and the delay-adjusted input signal where the timing is matched is used for distortion compensation of the input signal to the power amplifier 1 to improve DPD mode distortion compensation accuracy. ;COPYRIGHT: (C)2013,JPO&INPIT;PROBLEM TO BE SOLVED: To improve distortion compensation accuracy of a power amplifier.SOLUTION: An LMS algorithm using a feedback signal that is an output signal of a power amplifier 1 input via an attenuator 15 and pseudorandom data calculates a delay of an input signal to the power amplifier 1. A delay of an input signal to the power amplifier 1 is adjusted on the basis of the calculated delay to match timing of the input signal to the power amplifier 1 with a feedback signal including a fractional delay, and the delay-adjusted input signal where the timing is matched is used for distortion compensation of the input signal to the power amplifier 1 to improve DPD mode distortion compensation accuracy.
    Original languageEnglish
    Patent numberJP2013115725 (A)
    Priority date31/01/12
    Publication statusPublished - 10 Jun 2013

    Keywords

    • EWI-23117
    • IR-101965
    • METIS-296323

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