DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    Original languageEnglish
    Title of host publicationProceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing
    Place of PublicationUtrecht
    PublisherSTW
    Pages313-318
    Number of pages6
    ISBN (Print)90-73461-09-X
    Publication statusPublished - 27 Nov 1996

    Cite this

    Slump, C. H., Janssens, M. E., & Kuipers, H. (1996). DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL. In Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing (pp. 313-318). Utrecht: STW.
    Slump, Cornelis H. ; Janssens, M.E. ; Kuipers, Hendrik. / DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL. Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing. Utrecht : STW, 1996. pp. 313-318
    @inproceedings{1c0b9f7c0a274d0eae3bd88d567e51fd,
    title = "DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL",
    author = "Slump, {Cornelis H.} and M.E. Janssens and Hendrik Kuipers",
    year = "1996",
    month = "11",
    day = "27",
    language = "English",
    isbn = "90-73461-09-X",
    pages = "313--318",
    booktitle = "Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing",
    publisher = "STW",

    }

    Slump, CH, Janssens, ME & Kuipers, H 1996, DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL. in Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing. STW, Utrecht, pp. 313-318.

    DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL. / Slump, Cornelis H.; Janssens, M.E.; Kuipers, Hendrik.

    Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing. Utrecht : STW, 1996. p. 313-318.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    TY - GEN

    T1 - DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL

    AU - Slump, Cornelis H.

    AU - Janssens, M.E.

    AU - Kuipers, Hendrik

    PY - 1996/11/27

    Y1 - 1996/11/27

    M3 - Conference contribution

    SN - 90-73461-09-X

    SP - 313

    EP - 318

    BT - Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing

    PB - STW

    CY - Utrecht

    ER -

    Slump CH, Janssens ME, Kuipers H. DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL. In Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing. Utrecht: STW. 1996. p. 313-318