DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Original language	English
Title of host publication	Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing
Place of Publication	Utrecht
Publisher	STW
Pages	313-318
Number of pages	6
ISBN (Print)	90-73461-09-X
Publication status	Published - 27 Nov 1996

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@inproceedings{1c0b9f7c0a274d0eae3bd88d567e51fd,

title = "DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL",

author = "Slump, \{Cornelis H.\} and M.E. Janssens and Hendrik Kuipers",

year = "1996",

month = nov,

day = "27",

language = "English",

isbn = "90-73461-09-X",

pages = "313--318",

booktitle = "Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing",

publisher = "STW",

}

DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL. / Slump, Cornelis H.; Janssens, M.E.; Kuipers, Hendrik.
Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing. Utrecht: STW, 1996. p. 313-318.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - DSP and gatearray rapid prototyping of an adaptive phase-frequency detector for a PLL

AU - Slump, Cornelis H.

AU - Janssens, M.E.

AU - Kuipers, Hendrik

PY - 1996/11/27

Y1 - 1996/11/27

M3 - Conference contribution

SN - 90-73461-09-X

SP - 313

EP - 318

BT - Proceedings of the ProRISC/IEEE Workshop on Circuits, Systems and Signal Processing

PB - STW

CY - Utrecht

ER -