Dual-Layer Dielectric Stack for Thermally Isolated Low-Energy Phase-Change Memory

Scott W. Fong*, Christopher M. Neumann, Eilam Yalon, Miguel Munoz Rojo, Eric Pop, H. S.Philip Wong (Corresponding Author)

*Corresponding author for this work

Research output: Contribution to journalArticleAcademicpeer-review

22 Citations (Scopus)


High reset energy is an ongoing issue for phase-change memory (PCM) devices. Prior work demonstrates that smaller PCM switching volume and thermal isolation can reduce the reset energy. In this paper, we fabricate and measure a planar confined PCM device with a multilayer dual-layer stack (DLS) of SiO2/Al2O3 insulator. Devices with contact area of 500 to 20 nm and lengths of 2~ show exceptionally low reset energies of 18.25 ± 15.8 pJ and low reset current densities of 0.94 ± 0.51 MA/cm2. Implementing the DLS enables a 60% reduction in reset energy compared with SiO2-isolated devices.

Original languageEnglish
Article number8076849
Pages (from-to)4496-4502
Number of pages7
JournalIEEE Transactions on Electron Devices
Issue number11
Publication statusPublished - Nov 2017
Externally publishedYes


  • Phase-change memory (PCM)
  • reset energy
  • thermal conductivity
  • thermal design


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