Efficient Utilization of Hierarchical iJTAG Networks for Interrupts Management

Ahmed Mohammed Youssef Ibrahim, Hans G. Kerkhoff

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    6 Citations (Scopus)
    1 Downloads (Pure)

    Abstract

    Modern systems-on-chips rely on embedded instruments for testing and debugging, the same instruments could be used for managing the lifetime dependability of the chips. The IEEE 1687 (iJTAG) standard introduces an access network to the instruments based on reconfigurable scan paths. During lifetime, instruments could be required to initiate communication with a system-level dependability manager for different reasons. For example, fault/event occurrences or measurement read-out requests; however iJTAG networks are inherently master/slave networks, where the instruments are the network slaves. In this work, a scalable interrupts-management methodology is presented for allowing instruments-initiated communication using hierarchical iJTAG networks. The presented method allows for an efficient access of the network according to the required use-case by allowing the network to be configured into a corresponding optimized mode. In addition, a novel on-chip localization methodology is presented, which significantly reduces the localization time of interrupting instruments as compared to previous works.
    Original languageUndefined
    Title of host publication2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
    Place of PublicationUSA
    PublisherIEEE Computer Society
    Pages97-102
    Number of pages6
    ISBN (Print)978-1-5090-3623-3
    DOIs
    Publication statusPublished - 19 Sep 2016
    Event2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016 - University of Connecticut, Storrs, United States
    Duration: 19 Sep 201620 Sep 2016

    Publication series

    Name
    PublisherIEEE Computer Society

    Conference

    Conference2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016
    Abbreviated titleDFT
    CountryUnited States
    CityStorrs
    Period19/09/1620/09/16

    Keywords

    • EWI-27352
    • METIS-318573
    • IR-101897

    Cite this

    Ibrahim, A. M. Y., & Kerkhoff, H. G. (2016). Efficient Utilization of Hierarchical iJTAG Networks for Interrupts Management. In 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) (pp. 97-102). USA: IEEE Computer Society. https://doi.org/10.1109/DFT.2016.7684077